diff options
Diffstat (limited to 'libc/kernel/arch-mips/asm/processor.h')
| -rw-r--r-- | libc/kernel/arch-mips/asm/processor.h | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/libc/kernel/arch-mips/asm/processor.h b/libc/kernel/arch-mips/asm/processor.h new file mode 100644 index 000000000..356312181 --- /dev/null +++ b/libc/kernel/arch-mips/asm/processor.h @@ -0,0 +1,89 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PROCESSOR_H +#define _ASM_PROCESSOR_H +#include <linux/cpumask.h> +#include <linux/threads.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/cachectl.h> +#include <asm/cpu.h> +#include <asm/cpu-info.h> +#include <asm/mipsregs.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/prefetch.h> +#include <asm/system.h> +#define current_text_addr() ({ __label__ _l; _l: &&_l;}) +#define NUM_FPU_REGS 32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef __u64 fpureg_t; +struct mips_fpu_struct { + fpureg_t fpr[NUM_FPU_REGS]; + unsigned int fcr31; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define NUM_DSP_REGS 6 +typedef __u32 dspreg_t; +struct mips_dsp_state { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + dspreg_t dspr[NUM_DSP_REGS]; + unsigned int dspcontrol; +}; +#define INIT_CPUMASK { {0,} } +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef struct { + unsigned long seg; +} mm_segment_t; +#define ARCH_MIN_TASKALIGN 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mips_abi; +struct thread_struct { + unsigned long reg16; + unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long reg29, reg30, reg31; + unsigned long cp0_status; + struct mips_fpu_struct fpu; + struct mips_dsp_state dsp; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long cp0_badvaddr; + unsigned long cp0_baduaddr; + unsigned long error_code; + unsigned long trap_no; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long irix_trampoline; + unsigned long irix_oldctx; + struct mips_abi *abi; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPAFF_INIT +#define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, } +struct task_struct; +#define release_thread(thread) do { } while(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define prepare_to_copy(tsk) do { } while (0) +#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32) +#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1) +#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29]) +#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status) +#define cpu_relax() barrier() +#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif |