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| author | Chih-Hung Hsieh <chh@google.com> | 2015-05-11 11:21:19 -0700 |
|---|---|---|
| committer | Chih-Hung Hsieh <chh@google.com> | 2015-05-15 16:29:10 -0700 |
| commit | 43850d19f422d4850bebf765607e4f4d4b99df2e (patch) | |
| tree | dd519377f5a56e18ea04fbb2dba034694727d4e0 /libc/arch-arm/cortex-a9 | |
| parent | 22c21c6b4e789b9013ac472c77f43c91127cf9fa (diff) | |
| download | android_bionic-43850d19f422d4850bebf765607e4f4d4b99df2e.tar.gz android_bionic-43850d19f422d4850bebf765607e4f4d4b99df2e.tar.bz2 android_bionic-43850d19f422d4850bebf765607e4f4d4b99df2e.zip | |
Use unified syntax to compile with both llvm and gcc.
All arch-arm and arch-arm64 .S files were compiled
by gcc with and without this patch. The output object files
were identical. When compiled with llvm and this patch,
the output files were also identical to gcc's output.
BUG: 18061004
Change-Id: I458914d512ddf5496e4eb3d288bf032cd526d32b
(cherry picked from commit 33f33515b503b634d9fbc57dda7123ea9cf23fc6)
Diffstat (limited to 'libc/arch-arm/cortex-a9')
| -rw-r--r-- | libc/arch-arm/cortex-a9/bionic/memset.S | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/libc/arch-arm/cortex-a9/bionic/memset.S b/libc/arch-arm/cortex-a9/bionic/memset.S index 299f5a2d2..8ee6ac26c 100644 --- a/libc/arch-arm/cortex-a9/bionic/memset.S +++ b/libc/arch-arm/cortex-a9/bionic/memset.S @@ -35,6 +35,7 @@ */ .fpu neon + .syntax unified ENTRY(__memset_chk) cmp r2, r3 @@ -100,9 +101,9 @@ ENTRY(memset) 1: bge 2f vst1.32 {d0[0]}, [r0]! 2: movs ip, r2, lsl #31 - strmib r1, [r0], #1 - strcsb r1, [r0], #1 - strcsb r1, [r0], #1 + strbmi r1, [r0], #1 + strbcs r1, [r0], #1 + strbcs r1, [r0], #1 ldmfd sp!, {r0} bx lr END(memset) @@ -131,11 +132,11 @@ ENTRY_PRIVATE(__memset_large_copy) orr r1, r1, r1, lsr #16 movs r12, r3, lsl #31 - strcsb r1, [r0], #1 /* can't use strh (alignment unknown) */ - strcsb r1, [r0], #1 - strmib r1, [r0], #1 + strbcs r1, [r0], #1 /* can't use strh (alignment unknown) */ + strbcs r1, [r0], #1 + strbmi r1, [r0], #1 subs r2, r2, r3 - ldmlsfd sp!, {r0, r4-r7, lr} /* return */ + popls {r0, r4-r7, lr} /* return */ bxls lr /* align the destination to a cache-line */ @@ -155,9 +156,9 @@ ENTRY_PRIVATE(__memset_large_copy) /* conditionally writes 0 to 7 words (length in r3) */ movs r3, r3, lsl #28 - stmcsia r0!, {r1, lr} - stmcsia r0!, {r1, lr} - stmmiia r0!, {r1, lr} + stmcs r0!, {r1, lr} + stmcs r0!, {r1, lr} + stmmi r0!, {r1, lr} movs r3, r3, lsl #2 strcs r1, [r0], #4 @@ -172,13 +173,13 @@ ENTRY_PRIVATE(__memset_large_copy) /* conditionally stores 0 to 31 bytes */ movs r2, r2, lsl #28 - stmcsia r0!, {r1,r3,r12,lr} - stmmiia r0!, {r1, lr} + stmcs r0!, {r1,r3,r12,lr} + stmmi r0!, {r1, lr} movs r2, r2, lsl #2 strcs r1, [r0], #4 - strmih r1, [r0], #2 + strhmi r1, [r0], #2 movs r2, r2, lsl #2 - strcsb r1, [r0] + strbcs r1, [r0] ldmfd sp!, {r0, r4-r7, lr} bx lr END(__memset_large_copy) |