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* ART: set the check_bail_out flag to false by defaultWei Wang2016-06-051-1/+1
| | | | | | check_bail_out is disabled by default, set the flag to false Change-Id: I17ede384cb6b77e88e9618a50b4c07cdf3fd2d19
* art: allow devices to disable CAF bailout patchesSimon Shields2015-12-062-0/+22
| | | | | | these patches seem to break dex2oat on some non-qcom boards Change-Id: Ib70ca7e12d45ea49cbfa3f6acd04fe4a7f015055
* art: Fix whitespace errors added by cafChristopher R. Palmer2015-11-097-26/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All of these errors break compilation with GCC 4.9 and based on a spot check appear to be all CAF introduced changes. Fix these to avoid future breakage. Conflicts: compiler/dex/mir_graph.h compiler/dex/quick/arm/assemble_arm.cc compiler/dex/quick/arm/codegen_arm.h compiler/dex/quick/arm/target_arm.cc compiler/dex/quick/arm64/codegen_arm64.h compiler/dex/quick/arm64/target_arm64.cc compiler/dex/quick/mir_to_lir.h compiler/utils/growable_array.h Changes: compiler/dex/mir_graph.h compiler/dex/mir_optimization.cc compiler/dex/quick/arm/codegen_arm.h compiler/dex/quick/arm/target_arm.cc compiler/dex/quick/mir_to_lir.h compiler/dex/quick/quick_compiler.cc compiler/driver/compiler_driver.cc compiler/optimizing/inliner.cc compiler/optimizing/nodes.cc compiler/optimizing/optimizing_compiler.cc Change-Id: I3e23e1449eea0565fbe6f91251190b1e153f16cf Signed-off-by: AdrianDC <radian.dc@gmail.com>
* ART: move the check bail flag out of classWei Wang2015-10-062-8/+5
| | | | | | minor code refactoring. move the flag out of class declaration Change-Id: I65ae1601a282f2755ce31fe58364dd025718ff6d
* ART: extensionWei Wang2015-10-0617-58/+278
| | | | | | | 1. add hooks for further extension 2. minor code change Change-Id: I2615013b899f5f9b3495546e6001863fb054861a
* [MIPS] Avoid using odd numbered fp registersGoran Jakovljevic2015-08-111-22/+27
| | | | | | | | | Don't use odd numbered fp registers for single precision data on MIPS32r6 (64-bit FPU). Bug: 23050326 Change-Id: I35cc19df091149773411e2336b01c170929376bc (cherry picked from commit fc8156a3df88e259c892d50bf23f7c4f11531844)
* Allow for fine tuning the inliner.Calin Juravle2015-07-302-0/+4
| | | | | | | | | | Bug: 21868508 (cherry picked and squashed from commits ec74835a7e4f2660250a2f3f9508cbbe5269e49a and 0941b9d48a9a8c6d80a1af7a0d0fc9f80fe2b9a1) Change-Id: I1750e6bea20321d04680132281a6c2924531c5ae
* Merge "ART: Release inputs in Long.reverse intrinsic in x86" into mnc-devAndreas Gampe2015-07-081-0/+15
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| * ART: Release inputs in Long.reverse intrinsic in x86Andreas Gampe2015-07-081-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | In the worst case we are using two temps each for input and output. Then we do not have a temp left over for the swap operations. The input is dead, however, after the first swap. So try to release it (a no-op if it isn't actually a temp). Bug: 22324327 (cherry picked from commit 575422fa5be7389bdaff5e2d25dd87b1d2d4de85) Change-Id: I1fc50159afdad14160e34abeaf4670958171d6b2
* | ART: Fix opsize in LoadArgDirectAndreas Gampe2015-07-071-1/+2
|/ | | | | | | | | | | If the destination register is a reference, use kReference for the op size. Bug: 22244733 (cherry picked from commit 185a5586c8b796e770e9b4b7ac2befa8ccdaca7e) Change-Id: Idf52f2ee4c65b5dc41cb66257d95281dc6f32255
* Add implicit null pointer and stack overflow checks for Mips.Douglas Leung2015-07-035-5/+48
| | | | | | | (cherry picked from commit 22bb5a2ebc1e2724179faf4660b2735dcb185f21) Bug: 21555893 Change-Id: I2a995be128a5603d08753c14956dd8c8240ac63c
* Use a flag from the verifier to know if we should compile.Nicolas Geoffray2015-06-241-0/+5
| | | | | | | | | | | Only used for the lack of bottom type in the aget-object case for now. Could be used for more. bug:21865466 (cherry picked from commit 4824c27988c8eeb302791624bb3ce1d557b0db6c) Change-Id: I2bb7fe1d4737bd92c1076b5193607d74d8761ee7
* Merge "ART stack unwinding fixes for libunwind/gdb/lldb." into mnc-devDavid Srbecky2015-06-193-6/+4
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| * ART stack unwinding fixes for libunwind/gdb/lldb.David Srbecky2015-06-193-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dex2oat can already generate unwinding and symbol information which allows tools to create backtrace of mixed native and Java code. This is a cherry pick from aosp/master which fixes several issues. Most notably: * It enables generation of ELF-64 on 64-bit systems (in dex2oat, C compilers already produce ELF-64). Libunwind requires ELF-64 on 64-bit systems for backtraces to work. * It enables loading of ELF files with dlopen. This is required for libunwind to be able to generate backtrace of current process (i.e. the process requesting backtrace of itself). * It adds unit test to test the above (32 vs 64 bit, in-proces vs out-of-process, application code vs framework code). * Some other fixes or clean-ups which should not be of much significance but which are easier to include to make the important CLs cherry-pick cleanly. This is squash of the following commits from aosp/master: 7381010 ART: CFI Test e1bbed2 ART: Blacklist CFI test for non-compiled run-tests aab9f73 ART: Blacklist CFI test for JIT 4437219 ART: Blacklist CFI test for Heap Poisoning a3a49fe Switch to using ELF-64 for 64-bit architectures. 297ed22 Write 64-bit address in DWARF if we are on 64-bit architecture. 24981a1 Set correct size of PT_PHDR ELF segment. 1a146bf Link .dynamic to .dynstr 67a0653 Make some parts of ELF more (pointer) aligned. f50fa82 Enable 64-bit CFI tests. 49e1fab Use dlopen to load oat files. 5dedb80 Add more logging output for dlopen. aa03870 Find the dlopened file using address rather than file path. 82e73dc Release dummy MemMaps corresponding to dlopen. 5c40961 Test that we can unwind framework code. 020c543 Add more log output to the CFI test. 88da3b0 ART: Fix CFI test wrt/ PIC a70e5b9 CFI test: kill the other process in native code. ad5fa8c Support generation of CFI in .debug_frame format. 90688ae Fix build - large frame size of ElfWriterQuick<ElfTypes>::Write. 97dabb7 Fix build breakage in dwarf_test. 388d286 Generate just single ARM mapping symbol. f898087 Split .oat_patches to multiple sections. 491a7fe Fix build - large frame size of ElfWriterQuick<ElfTypes>::Write (again). 8363c77 Add --generate-debug-info flag and remove the other two flags. 461d72a Generate debug info for core.oat files. Bug: 21924613 Change-Id: I3f944a08dd2ed1df4d8a807da4fee423fdd35eb7
* | Quick: Handle total high/low register overlap on arm/mips.Vladimir Marko2015-06-192-6/+17
|/ | | | | | | | | | | | OpRegCopyWide() in arm and mips backends didn't handle the total register overlap when the registers holding the source and destination pairs are the same but in reverse order. Bug: 21897012 (cherry picked from commit 8958f7f8702327e713264d0538ab5dec586f3738) Change-Id: I20afce6cc3213e7f7b3edaef91f3ec29c469f877
* Move mirror::ArtMethod to nativeMathieu Chartier2015-06-0224-144/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimizing + quick tests are passing, devices boot. TODO: Test and fix bugs in mips64. Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS. Some of the savings are from removal of virtual methods and direct methods object arrays. Bug: 19264997 (cherry picked from commit e401d146407d61eeb99f8d6176b2ac13c4df1e33) Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d Fix some ArtMethod related bugs Added root visiting for runtime methods, not currently required since the GcRoots in these methods are null. Added missing GetInterfaceMethodIfProxy in GetMethodLine, fixes --trace run-tests 005, 044. Fixed optimizing compiler bug where we used a normal stack location instead of double on ARM64, this fixes the debuggable tests. TODO: Fix JDWP tests. Bug: 19264997 Change-Id: I7c55f69c61d1b45351fd0dc7185ffe5efad82bd3 ART: Fix casts for 64-bit pointers on 32-bit compiler. Bug: 19264997 Change-Id: Ief45cdd4bae5a43fc8bfdfa7cf744e2c57529457 Fix JDWP tests after ArtMethod change Fixes Throwable::GetStackDepth for exception event detection after internal stack trace representation change. Adds missing ArtMethod::GetInterfaceMethodIfProxy call in case of proxy method. Bug: 19264997 Change-Id: I363e293796848c3ec491c963813f62d868da44d2 Fix accidental IMT and root marking regression Was always using the conflict trampoline. Also included fix for regression in GC time caused by extra roots. Most of the regression was IMT. Fixed bug in DumpGcPerformanceInfo where we would get SIGABRT due to detached thread. EvaluateAndApplyChanges: From ~2500 -> ~1980 GC time: 8.2s -> 7.2s due to 1s less of MarkConcurrentRoots Bug: 19264997 Change-Id: I4333e80a8268c2ed1284f87f25b9f113d4f2c7e0 Fix bogus image test assert Previously we were comparing the size of the non moving space to size of the image file. Now we properly compare the size of the image space against the size of the image file. Bug: 19264997 Change-Id: I7359f1f73ae3df60c5147245935a24431c04808a [MIPS64] Fix art_quick_invoke_stub argument offsets. ArtMethod reference's size got bigger, so we need to move other args and leave enough space for ArtMethod* and 'this' pointer. This fixes mips64 boot. Bug: 19264997 Change-Id: I47198d5f39a4caab30b3b77479d5eedaad5006ab
* ART: Clean up arm64 kNumberOfXRegisters usage.Vladimir Marko2015-05-2610-7/+10
| | | | | | | | | | | | | | | | | | | | | Avoid undefined behavior for arm64 stemming from 1u << 32 in loops with upper bound kNumberOfXRegisters. Create iterators for enumerating bits in an integer either from high to low or from low to high and use them for <arch>Context::FillCalleeSaves() on all architectures. Refactor runtime/utils.{h,cc} by moving all bit-fiddling functions to runtime/base/bit_utils.{h,cc} (together with the new bit iterators) and all time-related functions to runtime/base/time_utils.{h,cc}. Improve test coverage and fix some corner cases for the bit-fiddling functions. Bug: 13925192 (cherry picked from commit 80afd02024d20e60b197d3adfbb43cc303cf29e0) Change-Id: I905257a21de90b5860ebe1e39563758f721eab82
* Quick: Abolish kMirOpCheckPart2.Vladimir Marko2015-05-073-32/+0
| | | | | | | | | | | | | | | | | | | | The tricks played with kMirOpCheckPart2 are making the native GC map generation unnecessarily complex. They have caused problems in the past and now there is bad interaction with the DCE. Rather than fixing it time and again, remove the pseudo-insn. (The whole purpose of those tricks seems to be to allow the register tracking to be used for the throwing insn before resetting the tracking for the next block. However, it's questionable whether that's better than processing the throwing insn with the subsequent instructions.) Bug: 20736048 (cherry picked from commit e299f167c9559401548eab71678d4b779e46c2fb) Change-Id: I8a60d26c5e6b6b608d68b8bb6b66d411f9a28f90
* Merge "Fix for incorrect encode and parse of PEXTRW instruction"Vladimir Marko2015-04-292-1/+8
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| * Fix for incorrect encode and parse of PEXTRW instructionnikolay serdjuk2015-04-292-1/+8
| | | | | | | | | | | | | | | | | | The instruction PEXTRW encoded by sequence 66 0F 3A 15 was incorrectly encoded in compiler table and incorrectly parsed by disassembler. Change-Id: Ib4d4db923cb15a76e74f13f6b5514cb0d1cbe164 Signed-off-by: nikolay serdjuk <nikolay.y.serdjuk@intel.com>
* | Merge "Revert "Revert "[optimizing] Replace FP divide by power of 2"""Nicolas Geoffray2015-04-281-20/+0
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| * Revert "Revert "[optimizing] Replace FP divide by power of 2""Nicolas Geoffray2015-04-271-20/+0
| | | | | | | | | | | | This reverts commit 067cae2c86627d2edcf01b918ee601774bc76aeb. Change-Id: Iaaa8772500ea7d3dce6ae0829dc0dc3bbc9c14ca
* | Merge "Replace String CharArray with internal uint16_t array."Jeff Hao2015-04-289-77/+391
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| * Replace String CharArray with internal uint16_t array.Jeff Hao2015-04-279-77/+391
| | | | | | | | | | | | | | | | | | | | | | | | Summary of high level changes: - Adds compiler inliner support to identify string init methods - Adds compiler support (quick & optimizing) with new invoke code path that calls method off the thread pointer - Adds thread entrypoints for all string init methods - Adds map to verifier to log when receiver of string init has been copied to other registers. used by compiler and interpreter Change-Id: I797b992a8feb566f9ad73060011ab6f51eb7ce01
* | Merge "Quick: Rely on inferred types in GVN/LVN/DCE."Vladimir Marko2015-04-271-1/+1
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| * Quick: Rely on inferred types in GVN/LVN/DCE.Vladimir Marko2015-04-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix LVN::GetEndingVregValueNumberImpl() to check whether the requested wideness matches the SSA register type as recorded in MIRGraph::reg_location_. Add DCHECKs that the wideness matches when getting/setting sreg values, update Phi handling in LVN/DCE to use the type from MIRGraph::reg_location_ instead of determining it from the sreg value maps which would now trigger the DCHECKs. Update tests to initialize MIRGraph::reg_location_. Reenable DCE. Bug: 20572509 Change-Id: I1a4d4e32cd57807ca8b56d2f3ed5e1288660b82e
* | ART: Fix addpd opcode, add Quick x86 assembler testChao-ying Fu2015-04-253-5/+271
|/ | | | | | | | | This patch fixes the addpd opcode that may be used by vectorizations, and adds an assembler test for the Quick x86 assembler, currently lightly testing addpd, subpd and mulpd. Change-Id: I29455a86212829c75fd75737679280f167da7b5b Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
* Disable Quick's GVN-based dead code elimination.Roland Levillain2015-04-251-1/+1
| | | | | | | Quick's GVN/DCE seems to trouble the builds. Bug: 20572509 Change-Id: I1e315b4eee4443f04c7cb2cef953d8e4eff619ce
* Merge "Quick: Fix and enable DCE and improve GVN/DCE cleanup."Vladimir Marko2015-04-241-1/+1
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| * Quick: Fix and enable DCE and improve GVN/DCE cleanup.Vladimir Marko2015-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | When eliminating a move by renaming its source register, check that it doesn't conflict with vreg usage by insns between the defining insn and the move. Improve the GVN/DCE cleanup so that it can handle cases where GVN or DCE is individually disabled in the pass driver but not in the disable_opt flags. Bug: 19419671 Change-Id: I49bb67b81509f51fbaf90c6016c509962be43736
* | Remove ArtMethod* parameter from dex cache entry points.Vladimir Marko2015-04-242-46/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Load the ArtMethod* using an optimized stack walk instead. This reduces the size of the generated code. Three of the entry points are called only from a slow-path and the fourth (InitializeTypeAndVerifyAccess) is rare and already slow enough that the one or two extra loads (depending on whether we already have the ArtMethod* in a register) are insignificant. And as we're starting to use PC-relative addressing of the dex cache arrays (already done by Quick for the boot image), having the ArtMethod* in a register becomes less likely anyway. Change-Id: Ib19b9d204e355e13bf386662a8b158178bf8ad28
* | Quick: Fix out of temp regs in ArmMir2Lir::GenMulLong().Vladimir Marko2015-04-231-5/+7
|/ | | | | | | | | | | | | This fixes running out of temp registers for mul-long that needs a temporary to store the result, i.e. when it's stored to stack location [sp, #offset] with offset >= 1024. The bug is currently not reproducible because ARM_R4_SUSPEND_FLAG is off and thus we have the extra register available. However, the code generation could be cleaned up and make use of that extra register, so pre-emptively fix it anyway. Bug: 20110806 Change-Id: I8362c349961dbe28fc3ec8a9299b66fd72f26779
* Revert "Revert "Quick: Rewrite type inference pass.""Vladimir Marko2015-04-231-0/+3
| | | | | | | | | Fix the type of the ArtMethod* SSA register. Bug: 19419671 This reverts commit 1b717f63847de8762e7f7bdd6708fdfae9d24a67. Change-Id: Ie4da3c03a0e0334a39a24718f6dc31f9255cfb53
* Revert "Quick: Rewrite type inference pass."Andreas Gampe2015-04-221-3/+0
| | | | | | | | Breaks arm64, as the method register is not correctly flagged as ref and thus 32bit. Bug: 19419671 This reverts commit e490b01c12d33f3bd5c247b55b47e507cc9c8fab.
* Replace NULL with nullptrMathieu Chartier2015-04-2227-127/+127
| | | | | | | Also fixed some lines that were too long, and a few other minor details. Change-Id: I6efba5fb6e03eb5d0a300fddb2a75bf8e2f175cb
* Quick: Rewrite type inference pass.Vladimir Marko2015-04-221-0/+3
| | | | | | | | | | | Use method signatures, field types and types embedded in dex insns for type inference. Perform the type inference in two phases, first a simple pass that records all types implied by individual insns, and then an iterative pass to propagate those types further via phi, move, if-cc and aget/aput insns. Bug: 19419671 Change-Id: Id38579d48a44fc5eadd13780afb6d370093056f9
* Quick: Remove broken Mir2Lir::LocToRegClass().Vladimir Marko2015-04-229-48/+31
| | | | | | | | | | | | Its use in intrinsics has been bogus. In all other instances it's been used under the assumption that the inferred type matches the return type of associated calls. However, if the type inference identifies a type mismatch, the assumption doesn't hold and there isn't necessarily a valid value that the function could reasonably return. Bug: 19918641 Change-Id: I050934e6f9eb00427d0b888ee29ae9eeb509bb3f
* ART: Add compiled-methodsAndreas Gampe2015-04-211-1/+1
| | | | | | | | | | | Add a dex2oat option for compiled-methods, a more granular filter than compiled-classes. Add compiler-driver support for it. Refactor dex2oat to reuse file reading. Add a test to oat_test. Change-Id: I78d0d040bce7738b4bb7aabe7768b5788d2587ac
* Fix value used for shift in quick_cfi_test.Dan Albert2015-04-161-2/+2
| | | | | | | | | | The spill mask bit should be shifted by the register number, not the whole register mask. Previously this test was shifting by values well over the width of the type, which is undefined behavior. Change-Id: Idf750be6d95b4487f8f4570b8c7ff9dba38be9f2
* ARM64: Remove suspend register.Zheng Xu2015-04-144-23/+21
| | | | | | | | It also clean up build/remove frame used by JNI compiler and generates stp/ldp instead of str/ldr. Also x19 has been unblocked in both quick and optimizing compiler. Change-Id: Idbeac0942265f493266b2ef9b7a65bb4054f0e2d
* Add --include-cfi compiler option.David Srbecky2015-04-132-1/+2
| | | | | | | | | | | | Decouple generation of CFI from the rest of debug symbols. This makes it possible to generate oat with CFI but without the rest of debug symbols. This is in line with intention of the .eh_frame section. The section does not have the .debug_ prefix because it is considered somewhat different to the rest of debug symbols. Change-Id: I32816ecd4f30ac4e0dc69d69a4993e349c737f96
* Remove the --gen-gdb-info compiler option.David Srbecky2015-04-121-1/+0
| | | | | | It is never used. We generally use --include-debug-symbols instead. Change-Id: I933495cd85ab4f7dfcf3ef3cd2d943d4b870ffeb
* ART: Remove WriteElf from CompilerAndreas Gampe2015-04-102-22/+0
| | | | | | | | As Portable is gone, we only have one elf_writer left. It also allows to put the decision for 32b vs 64b ELF into a central point. Change-Id: Iae67d06df85268b3f0ee5725abc65edd23eb2499
* Merge "Fix memory leaks in the CFI tests."David Srbecky2015-04-091-1/+1
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| * Fix memory leaks in the CFI tests.David Srbecky2015-04-091-1/+1
| | | | | | | | Change-Id: Icb98e4995731c7ac5f99d1be20b447161ea4c4bd
* | ART: Fix indent in Mips backendAndreas Gampe2015-04-092-78/+78
| | | | | | | | Change-Id: Ib8bc6f6bf36079e0b6e4b65ceab8af7dedc60efc
* | Merge "Fix GenDivRemLit() for Mips."Andreas Gampe2015-04-091-1/+7
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| * Fix GenDivRemLit() for Mips.Douglas Leung2015-04-071-1/+7
| | | | | | | | | | | | | | | | This bug was reported by Ingenic where the result is incorrect if we divide a number by an unsigned 16-bit constant with its MSB bit (bit 15) set. Change-Id: I53d2599918cc47b1a9809160310716dca67ef243
* | Merge "Quick: PC-relative loads from dex cache arrays on x86."Vladimir Marko2015-04-0911-309/+243
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| * | Quick: PC-relative loads from dex cache arrays on x86.Vladimir Marko2015-04-0911-309/+243
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite all PC-relative addressing on x86 and implement PC-relative loads from dex cache arrays. Don't adjust the base to point to the start of the method, let it point to the anchor, i.e. the target of the "call +0" insn. Change-Id: Ic22544a8bc0c5e49eb00a75154dc8f3ead816989
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