diff options
Diffstat (limited to 'compiler/dex/quick/x86/codegen_x86.h')
| -rw-r--r-- | compiler/dex/quick/x86/codegen_x86.h | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/compiler/dex/quick/x86/codegen_x86.h b/compiler/dex/quick/x86/codegen_x86.h index b3544dafba..7b5b831e38 100644 --- a/compiler/dex/quick/x86/codegen_x86.h +++ b/compiler/dex/quick/x86/codegen_x86.h @@ -180,11 +180,11 @@ class X86Mir2Lir : public Mir2Lir { // Long instructions. void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, - RegLocation rl_src2) OVERRIDE; + RegLocation rl_src2, int flags) OVERRIDE; void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, - RegLocation rl_src2) OVERRIDE; + RegLocation rl_src2, int flags) OVERRIDE; void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, - RegLocation rl_src1, RegLocation rl_shift) OVERRIDE; + RegLocation rl_src1, RegLocation rl_shift, int flags) OVERRIDE; void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE; void GenIntToLong(RegLocation rl_dest, RegLocation rl_src) OVERRIDE; void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, @@ -314,9 +314,10 @@ class X86Mir2Lir : public Mir2Lir { * @param rl_dest Destination for the result. * @param rl_lhs Left hand operand. * @param rl_rhs Right hand operand. + * @param flags The instruction optimization flags. */ void GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_lhs, - RegLocation rl_rhs) OVERRIDE; + RegLocation rl_rhs, int flags) OVERRIDE; /* * @brief Load the Method* of a dex method into the register. @@ -768,10 +769,11 @@ class X86Mir2Lir : public Mir2Lir { * @param rl_src1 Numerator Location. * @param rl_src2 Divisor Location. * @param is_div 'true' if this is a division, 'false' for a remainder. - * @param check_zero 'true' if an exception should be generated if the divisor is 0. + * @param flags The instruction optimization flags. It can include information + * if exception check can be elided. */ RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, - bool is_div, bool check_zero); + bool is_div, int flags); /* * @brief Generate an integer div or rem operation by a literal. @@ -788,10 +790,11 @@ class X86Mir2Lir : public Mir2Lir { * @param rl_dest The destination. * @param rl_src The value to be shifted. * @param shift_amount How much to shift. + * @param flags The instruction optimization flags. * @returns the RegLocation of the result. */ RegLocation GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, - RegLocation rl_src, int shift_amount); + RegLocation rl_src, int shift_amount, int flags); /* * Generate an imul of a register by a constant or a better sequence. * @param dest Destination Register. @@ -858,13 +861,13 @@ class X86Mir2Lir : public Mir2Lir { // Try to do a long multiplication where rl_src2 is a constant. This simplified setup might fail, // in which case false will be returned. - bool GenMulLongConst(RegLocation rl_dest, RegLocation rl_src1, int64_t val); + bool GenMulLongConst(RegLocation rl_dest, RegLocation rl_src1, int64_t val, int flags); void GenMulLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, - RegLocation rl_src2); + RegLocation rl_src2, int flags); void GenNotLong(RegLocation rl_dest, RegLocation rl_src); void GenNegLong(RegLocation rl_dest, RegLocation rl_src); void GenDivRemLong(Instruction::Code, RegLocation rl_dest, RegLocation rl_src1, - RegLocation rl_src2, bool is_div); + RegLocation rl_src2, bool is_div, int flags); void SpillCoreRegs(); void UnSpillCoreRegs(); |