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| author | Yixin Shou <yixin.shou@intel.com> | 2014-08-14 14:10:32 -0400 |
|---|---|---|
| committer | Ian Rogers <irogers@google.com> | 2014-08-14 15:21:12 -0700 |
| commit | f40f890ae3acd7b3275355ec90e2814bba8d4fd6 (patch) | |
| tree | 2c25813aefc9fd579a6527ccb8145fba10f5d768 /disassembler/disassembler_x86.cc | |
| parent | 6324ca4706de44b75e5b8ba55473766809c4f132 (diff) | |
| download | android_art-f40f890ae3acd7b3275355ec90e2814bba8d4fd6.tar.gz android_art-f40f890ae3acd7b3275355ec90e2814bba8d4fd6.tar.bz2 android_art-f40f890ae3acd7b3275355ec90e2814bba8d4fd6.zip | |
Implement inlined shift long for 32bit
Added support for x86 inlined shift long for 32bit
Change-Id: I6caef60dd7d80227c3057fd6f64b0ecb11025afa
Signed-off-by: Yixin Shou <yixin.shou@intel.com>
Diffstat (limited to 'disassembler/disassembler_x86.cc')
| -rw-r--r-- | disassembler/disassembler_x86.cc | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc index 0ca8962282..0bf758efb9 100644 --- a/disassembler/disassembler_x86.cc +++ b/disassembler/disassembler_x86.cc @@ -702,12 +702,24 @@ DISASSEMBLER_ENTRY(cmp, load = true; immediate_bytes = 1; break; + case 0xA5: + opcode << "shld"; + has_modrm = true; + load = true; + cx = true; + break; case 0xAC: opcode << "shrd"; has_modrm = true; load = true; immediate_bytes = 1; break; + case 0xAD: + opcode << "shrd"; + has_modrm = true; + load = true; + cx = true; + break; case 0xAE: if (prefix[0] == 0xF3) { prefix[0] = 0; // clear prefix now it's served its purpose as part of the opcode |