diff options
author | Andreas Gampe <agampe@google.com> | 2015-02-13 19:23:55 -0800 |
---|---|---|
committer | Andreas Gampe <agampe@google.com> | 2015-02-18 16:50:22 -0800 |
commit | ab1eb0d1d047e3478ebb891e5259d2f1d1dd78bd (patch) | |
tree | a2d211ec81294adab2981d0179c8f04be3e8c8c4 /compiler/utils | |
parent | 6e27f82193a8f54cd8ecdc8fb2c4c1adadafbaf4 (diff) | |
download | android_art-ab1eb0d1d047e3478ebb891e5259d2f1d1dd78bd.tar.gz android_art-ab1eb0d1d047e3478ebb891e5259d2f1d1dd78bd.tar.bz2 android_art-ab1eb0d1d047e3478ebb891e5259d2f1d1dd78bd.zip |
ART: Templatize IsInt & IsUint
Ensure that things are used correctly.
Change-Id: I76f082b32dcee28bbfb4c519daa401ac595873b3
Diffstat (limited to 'compiler/utils')
-rw-r--r-- | compiler/utils/arm/assembler_arm.cc | 31 | ||||
-rw-r--r-- | compiler/utils/arm/assembler_arm32.cc | 2 | ||||
-rw-r--r-- | compiler/utils/arm/assembler_thumb2.cc | 4 | ||||
-rw-r--r-- | compiler/utils/x86/assembler_x86.cc | 4 | ||||
-rw-r--r-- | compiler/utils/x86/assembler_x86.h | 8 | ||||
-rw-r--r-- | compiler/utils/x86_64/assembler_x86_64.cc | 10 | ||||
-rw-r--r-- | compiler/utils/x86_64/assembler_x86_64.h | 14 | ||||
-rw-r--r-- | compiler/utils/x86_64/assembler_x86_64_test.cc | 35 |
8 files changed, 58 insertions, 50 deletions
diff --git a/compiler/utils/arm/assembler_arm.cc b/compiler/utils/arm/assembler_arm.cc index 1f44f19b23..a52e6eb30f 100644 --- a/compiler/utils/arm/assembler_arm.cc +++ b/compiler/utils/arm/assembler_arm.cc @@ -166,7 +166,7 @@ uint32_t ShifterOperand::encodingThumb() const { } uint32_t Address::encodingArm() const { - CHECK(IsAbsoluteUint(12, offset_)); + CHECK(IsAbsoluteUint<12>(offset_)); uint32_t encoding; if (is_immed_offset_) { if (offset_ < 0) { @@ -278,11 +278,12 @@ uint32_t Address::encoding3() const { // Encoding for vfp load/store addressing. uint32_t Address::vencoding() const { + CHECK(IsAbsoluteUint<10>(offset_)); // In the range -1020 to +1020. + CHECK_ALIGNED(offset_, 2); // Multiple of 4. + const uint32_t offset_mask = (1 << 12) - 1; uint32_t encoding = encodingArm(); uint32_t offset = encoding & offset_mask; - CHECK(IsAbsoluteUint(10, offset)); // In the range -1020 to +1020. - CHECK_ALIGNED(offset, 2); // Multiple of 4. CHECK((am_ == Offset) || (am_ == NegOffset)); uint32_t vencoding_value = (encoding & (0xf << kRnShift)) | (offset >> 2); if (am_ == Offset) { @@ -298,13 +299,13 @@ bool Address::CanHoldLoadOffsetArm(LoadOperandType type, int offset) { case kLoadSignedHalfword: case kLoadUnsignedHalfword: case kLoadWordPair: - return IsAbsoluteUint(8, offset); // Addressing mode 3. + return IsAbsoluteUint<8>(offset); // Addressing mode 3. case kLoadUnsignedByte: case kLoadWord: - return IsAbsoluteUint(12, offset); // Addressing mode 2. + return IsAbsoluteUint<12>(offset); // Addressing mode 2. case kLoadSWord: case kLoadDWord: - return IsAbsoluteUint(10, offset); // VFP addressing mode. + return IsAbsoluteUint<10>(offset); // VFP addressing mode. default: LOG(FATAL) << "UNREACHABLE"; UNREACHABLE(); @@ -316,13 +317,13 @@ bool Address::CanHoldStoreOffsetArm(StoreOperandType type, int offset) { switch (type) { case kStoreHalfword: case kStoreWordPair: - return IsAbsoluteUint(8, offset); // Addressing mode 3. + return IsAbsoluteUint<8>(offset); // Addressing mode 3. case kStoreByte: case kStoreWord: - return IsAbsoluteUint(12, offset); // Addressing mode 2. + return IsAbsoluteUint<12>(offset); // Addressing mode 2. case kStoreSWord: case kStoreDWord: - return IsAbsoluteUint(10, offset); // VFP addressing mode. + return IsAbsoluteUint<10>(offset); // VFP addressing mode. default: LOG(FATAL) << "UNREACHABLE"; UNREACHABLE(); @@ -336,12 +337,12 @@ bool Address::CanHoldLoadOffsetThumb(LoadOperandType type, int offset) { case kLoadUnsignedHalfword: case kLoadUnsignedByte: case kLoadWord: - return IsAbsoluteUint(12, offset); + return IsAbsoluteUint<12>(offset); case kLoadSWord: case kLoadDWord: - return IsAbsoluteUint(10, offset); // VFP addressing mode. + return IsAbsoluteUint<10>(offset); // VFP addressing mode. case kLoadWordPair: - return IsAbsoluteUint(10, offset); + return IsAbsoluteUint<10>(offset); default: LOG(FATAL) << "UNREACHABLE"; UNREACHABLE(); @@ -354,12 +355,12 @@ bool Address::CanHoldStoreOffsetThumb(StoreOperandType type, int offset) { case kStoreHalfword: case kStoreByte: case kStoreWord: - return IsAbsoluteUint(12, offset); + return IsAbsoluteUint<12>(offset); case kStoreSWord: case kStoreDWord: - return IsAbsoluteUint(10, offset); // VFP addressing mode. + return IsAbsoluteUint<10>(offset); // VFP addressing mode. case kStoreWordPair: - return IsAbsoluteUint(10, offset); + return IsAbsoluteUint<10>(offset); default: LOG(FATAL) << "UNREACHABLE"; UNREACHABLE(); diff --git a/compiler/utils/arm/assembler_arm32.cc b/compiler/utils/arm/assembler_arm32.cc index 8d1fb60725..95796916b4 100644 --- a/compiler/utils/arm/assembler_arm32.cc +++ b/compiler/utils/arm/assembler_arm32.cc @@ -1254,7 +1254,7 @@ void Arm32Assembler::vmstat(Condition cond) { // VMRS APSR_nzcv, FPSCR void Arm32Assembler::svc(uint32_t imm24) { - CHECK(IsUint(24, imm24)) << imm24; + CHECK(IsUint<24>(imm24)) << imm24; int32_t encoding = (AL << kConditionShift) | B27 | B26 | B25 | B24 | imm24; Emit(encoding); } diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc index 5383c28f82..6d0571e263 100644 --- a/compiler/utils/arm/assembler_thumb2.cc +++ b/compiler/utils/arm/assembler_thumb2.cc @@ -2080,7 +2080,7 @@ void Thumb2Assembler::vmstat(Condition cond) { // VMRS APSR_nzcv, FPSCR. void Thumb2Assembler::svc(uint32_t imm8) { - CHECK(IsUint(8, imm8)) << imm8; + CHECK(IsUint<8>(imm8)) << imm8; int16_t encoding = B15 | B14 | B12 | B11 | B10 | B9 | B8 | imm8; @@ -2089,7 +2089,7 @@ void Thumb2Assembler::svc(uint32_t imm8) { void Thumb2Assembler::bkpt(uint16_t imm8) { - CHECK(IsUint(8, imm8)) << imm8; + CHECK(IsUint<8>(imm8)) << imm8; int16_t encoding = B15 | B13 | B12 | B11 | B10 | B9 | imm8; diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc index 03744e4149..8f4208b417 100644 --- a/compiler/utils/x86/assembler_x86.cc +++ b/compiler/utils/x86/assembler_x86.cc @@ -1290,7 +1290,7 @@ void X86Assembler::j(Condition condition, Label* label) { static const int kLongSize = 6; int offset = label->Position() - buffer_.Size(); CHECK_LE(offset, 0); - if (IsInt(8, offset - kShortSize)) { + if (IsInt<8>(offset - kShortSize)) { EmitUint8(0x70 + condition); EmitUint8((offset - kShortSize) & 0xFF); } else { @@ -1325,7 +1325,7 @@ void X86Assembler::jmp(Label* label) { static const int kLongSize = 5; int offset = label->Position() - buffer_.Size(); CHECK_LE(offset, 0); - if (IsInt(8, offset - kShortSize)) { + if (IsInt<8>(offset - kShortSize)) { EmitUint8(0xEB); EmitUint8((offset - kShortSize) & 0xFF); } else { diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h index 3a44ace649..2dde90744e 100644 --- a/compiler/utils/x86/assembler_x86.h +++ b/compiler/utils/x86/assembler_x86.h @@ -35,10 +35,10 @@ class Immediate : public ValueObject { int32_t value() const { return value_; } - bool is_int8() const { return IsInt(8, value_); } - bool is_uint8() const { return IsUint(8, value_); } - bool is_int16() const { return IsInt(16, value_); } - bool is_uint16() const { return IsUint(16, value_); } + bool is_int8() const { return IsInt<8>(value_); } + bool is_uint8() const { return IsUint<8>(value_); } + bool is_int16() const { return IsInt<16>(value_); } + bool is_uint16() const { return IsUint<16>(value_); } private: const int32_t value_; diff --git a/compiler/utils/x86_64/assembler_x86_64.cc b/compiler/utils/x86_64/assembler_x86_64.cc index 556fa9b38f..f2704b72a4 100644 --- a/compiler/utils/x86_64/assembler_x86_64.cc +++ b/compiler/utils/x86_64/assembler_x86_64.cc @@ -1515,7 +1515,7 @@ void X86_64Assembler::imull(CpuRegister reg, const Immediate& imm) { // See whether imm can be represented as a sign-extended 8bit value. int32_t v32 = static_cast<int32_t>(imm.value()); - if (IsInt32(8, v32)) { + if (IsInt<8>(v32)) { // Sign-extension works. EmitUint8(0x6B); EmitOperand(reg.LowBits(), Operand(reg)); @@ -1555,7 +1555,7 @@ void X86_64Assembler::imulq(CpuRegister reg, const Immediate& imm) { // See whether imm can be represented as a sign-extended 8bit value. int64_t v64 = imm.value(); - if (IsInt64(8, v64)) { + if (IsInt<8>(v64)) { // Sign-extension works. EmitUint8(0x6B); EmitOperand(reg.LowBits(), Operand(reg)); @@ -1705,7 +1705,7 @@ void X86_64Assembler::notq(CpuRegister reg) { void X86_64Assembler::enter(const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitUint8(0xC8); - CHECK(imm.is_uint16()); + CHECK(imm.is_uint16()) << imm.value(); EmitUint8(imm.value() & 0xFF); EmitUint8((imm.value() >> 8) & 0xFF); EmitUint8(0x00); @@ -1759,7 +1759,7 @@ void X86_64Assembler::j(Condition condition, Label* label) { static const int kLongSize = 6; int offset = label->Position() - buffer_.Size(); CHECK_LE(offset, 0); - if (IsInt(8, offset - kShortSize)) { + if (IsInt<8>(offset - kShortSize)) { EmitUint8(0x70 + condition); EmitUint8((offset - kShortSize) & 0xFF); } else { @@ -1796,7 +1796,7 @@ void X86_64Assembler::jmp(Label* label) { static const int kLongSize = 5; int offset = label->Position() - buffer_.Size(); CHECK_LE(offset, 0); - if (IsInt(8, offset - kShortSize)) { + if (IsInt<8>(offset - kShortSize)) { EmitUint8(0xEB); EmitUint8((offset - kShortSize) & 0xFF); } else { diff --git a/compiler/utils/x86_64/assembler_x86_64.h b/compiler/utils/x86_64/assembler_x86_64.h index a1c704e94c..5dfcf4541b 100644 --- a/compiler/utils/x86_64/assembler_x86_64.h +++ b/compiler/utils/x86_64/assembler_x86_64.h @@ -42,15 +42,11 @@ class Immediate : public ValueObject { int64_t value() const { return value_; } - bool is_int8() const { return IsInt(8, value_); } - bool is_uint8() const { return IsUint(8, value_); } - bool is_int16() const { return IsInt(16, value_); } - bool is_uint16() const { return IsUint(16, value_); } - bool is_int32() const { - // This does not work on 32b machines: return IsInt(32, value_); - int64_t limit = static_cast<int64_t>(1) << 31; - return (-limit <= value_) && (value_ < limit); - } + bool is_int8() const { return IsInt<8>(value_); } + bool is_uint8() const { return IsUint<8>(value_); } + bool is_int16() const { return IsInt<16>(value_); } + bool is_uint16() const { return IsUint<16>(value_); } + bool is_int32() const { return IsInt<32>(value_); } private: const int64_t value_; diff --git a/compiler/utils/x86_64/assembler_x86_64_test.cc b/compiler/utils/x86_64/assembler_x86_64_test.cc index 6df4144004..00f508b23f 100644 --- a/compiler/utils/x86_64/assembler_x86_64_test.cc +++ b/compiler/utils/x86_64/assembler_x86_64_test.cc @@ -44,10 +44,10 @@ static constexpr size_t kRandomIterations = 100000; // Hosts are pretty powerfu TEST(AssemblerX86_64, SignExtension) { // 32bit. for (int32_t i = 0; i < 128; i++) { - EXPECT_TRUE(IsInt32(8, i)) << i; + EXPECT_TRUE(IsInt<8>(i)) << i; } for (int32_t i = 128; i < 255; i++) { - EXPECT_FALSE(IsInt32(8, i)) << i; + EXPECT_FALSE(IsInt<8>(i)) << i; } // Do some higher ones randomly. std::random_device rd; @@ -55,54 +55,65 @@ TEST(AssemblerX86_64, SignExtension) { std::uniform_int_distribution<int32_t> uniform_dist(256, INT32_MAX); for (size_t i = 0; i < kRandomIterations; i++) { int32_t value = uniform_dist(e1); - EXPECT_FALSE(IsInt32(8, value)) << value; + EXPECT_FALSE(IsInt<8>(value)) << value; } // Negative ones. for (int32_t i = -1; i >= -128; i--) { - EXPECT_TRUE(IsInt32(8, i)) << i; + EXPECT_TRUE(IsInt<8>(i)) << i; } for (int32_t i = -129; i > -256; i--) { - EXPECT_FALSE(IsInt32(8, i)) << i; + EXPECT_FALSE(IsInt<8>(i)) << i; } // Do some lower ones randomly. std::uniform_int_distribution<int32_t> uniform_dist2(INT32_MIN, -256); for (size_t i = 0; i < 100; i++) { int32_t value = uniform_dist2(e1); - EXPECT_FALSE(IsInt32(8, value)) << value; + EXPECT_FALSE(IsInt<8>(value)) << value; } // 64bit. for (int64_t i = 0; i < 128; i++) { - EXPECT_TRUE(IsInt64(8, i)) << i; + EXPECT_TRUE(IsInt<8>(i)) << i; } for (int32_t i = 128; i < 255; i++) { - EXPECT_FALSE(IsInt64(8, i)) << i; + EXPECT_FALSE(IsInt<8>(i)) << i; } // Do some higher ones randomly. std::uniform_int_distribution<int64_t> uniform_dist3(256, INT64_MAX); for (size_t i = 0; i < 100; i++) { int64_t value = uniform_dist3(e1); - EXPECT_FALSE(IsInt64(8, value)) << value; + EXPECT_FALSE(IsInt<8>(value)) << value; } // Negative ones. for (int64_t i = -1; i >= -128; i--) { - EXPECT_TRUE(IsInt64(8, i)) << i; + EXPECT_TRUE(IsInt<8>(i)) << i; } for (int64_t i = -129; i > -256; i--) { - EXPECT_FALSE(IsInt64(8, i)) << i; + EXPECT_FALSE(IsInt<8>(i)) << i; } // Do some lower ones randomly. std::uniform_int_distribution<int64_t> uniform_dist4(INT64_MIN, -256); for (size_t i = 0; i < kRandomIterations; i++) { int64_t value = uniform_dist4(e1); - EXPECT_FALSE(IsInt64(8, value)) << value; + EXPECT_FALSE(IsInt<8>(value)) << value; } + + int64_t value = INT64_C(0x1200000010); + x86_64::Immediate imm(value); + EXPECT_FALSE(imm.is_int8()); + EXPECT_FALSE(imm.is_int16()); + EXPECT_FALSE(imm.is_int32()); + value = INT64_C(0x8000000000000001); + x86_64::Immediate imm2(value); + EXPECT_FALSE(imm2.is_int8()); + EXPECT_FALSE(imm2.is_int16()); + EXPECT_FALSE(imm2.is_int32()); } struct X86_64CpuRegisterCompare { |