Exercise the x86 and x86-64 FILD and FISTP instructions.

- Ensure the double- and quadword x87 (FPU) instructions for
  integer loading (resp. fildl and fildll) are properly
  generated by the x86 and x86-64 generators (resp.
  X86Assembler::filds/X86_64Assembler::filds and
  X86Assembler::fildl/X86_64Assembler::fildl).
- Ensure the double- and quadword x87 (FPU) instructions for
  integer storing & popping (resp. filstpl and fistpll) are
  properly generated by the x86 and x86-64 generators (resp.
  X86Assembler::fistps/X86_64Assembler::fistps and
  X86Assembler::fistpl/X86_64Assembler::fistpl).

These instructions can be used in the implementation of the
long-to-float and long-to-double Dex type conversions.

Change-Id: Iade52a9aee326d189d77d3dbd352a2b5dab52e46

1 files changed, 18 insertions, 0 deletions

diff --git a/compiler/utils/x86/assembler_x86_test.cc b/compiler/utils/x86/assembler_x86_test.cc
index dba3b6ba67..f326e496d4 100644
--- a/compiler/utils/x86/assembler_x86_test.cc
+++ b/compiler/utils/x86/assembler_x86_test.cc
@@ -172,4 +172,22 @@ TEST_F(AssemblerX86Test, LockCmpxchg8b) {
   DriverStr(expected, "lock_cmpxchg8b");
 }
 
+TEST_F(AssemblerX86Test, FPUIntegerLoad) {
+  GetAssembler()->filds(x86::Address(x86::Register(x86::ESP), 4));
+  GetAssembler()->fildl(x86::Address(x86::Register(x86::ESP), 12));
+  const char* expected =
+      "fildl 0x4(%ESP)\n"
+      "fildll 0xc(%ESP)\n";
+  DriverStr(expected, "FPUIntegerLoad");
+}
+
+TEST_F(AssemblerX86Test, FPUIntegerStore) {
+  GetAssembler()->fistps(x86::Address(x86::Register(x86::ESP), 16));
+  GetAssembler()->fistpl(x86::Address(x86::Register(x86::ESP), 24));
+  const char* expected =
+      "fistpl 0x10(%ESP)\n"
+      "fistpll 0x18(%ESP)\n";
+  DriverStr(expected, "FPUIntegerStore");
+}
+
 }  // namespace art