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author | Mathieu Chartier <mathieuc@google.com> | 2014-05-07 15:43:14 -0700 |
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committer | Mathieu Chartier <mathieuc@google.com> | 2014-05-13 14:45:54 -0700 |
commit | eb8167a4f4d27fce0530f6724ab8032610cd146b (patch) | |
tree | bcfeaf13ad78f2dd68466bbd0e20c71944f7e854 /compiler/utils/x86/assembler_x86.cc | |
parent | 6fb66a2bc4e1c0b7931101153e58714991237af7 (diff) | |
download | android_art-eb8167a4f4d27fce0530f6724ab8032610cd146b.tar.gz android_art-eb8167a4f4d27fce0530f6724ab8032610cd146b.tar.bz2 android_art-eb8167a4f4d27fce0530f6724ab8032610cd146b.zip |
Add Handle/HandleScope and delete SirtRef.
Delete SirtRef and replaced it with Handle. Handles are value types
which wrap around StackReference*.
Renamed StackIndirectReferenceTable to HandleScope.
Added a scoped handle wrapper which wraps around an Object** and
restores it in its destructor.
Renamed Handle::get -> Get.
Bug: 8473721
Change-Id: Idbfebd4f35af629f0f43931b7c5184b334822c7a
Diffstat (limited to 'compiler/utils/x86/assembler_x86.cc')
-rw-r--r-- | compiler/utils/x86/assembler_x86.cc | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc index 6a3efc5431..0791c63f90 100644 --- a/compiler/utils/x86/assembler_x86.cc +++ b/compiler/utils/x86/assembler_x86.cc @@ -1727,8 +1727,8 @@ void X86Assembler::MemoryBarrier(ManagedRegister) { #endif } -void X86Assembler::CreateSirtEntry(ManagedRegister mout_reg, - FrameOffset sirt_offset, +void X86Assembler::CreateHandleScopeEntry(ManagedRegister mout_reg, + FrameOffset handle_scope_offset, ManagedRegister min_reg, bool null_allowed) { X86ManagedRegister out_reg = mout_reg.AsX86(); X86ManagedRegister in_reg = min_reg.AsX86(); @@ -1742,34 +1742,34 @@ void X86Assembler::CreateSirtEntry(ManagedRegister mout_reg, } testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); j(kZero, &null_arg); - leal(out_reg.AsCpuRegister(), Address(ESP, sirt_offset)); + leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset)); Bind(&null_arg); } else { - leal(out_reg.AsCpuRegister(), Address(ESP, sirt_offset)); + leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset)); } } -void X86Assembler::CreateSirtEntry(FrameOffset out_off, - FrameOffset sirt_offset, +void X86Assembler::CreateHandleScopeEntry(FrameOffset out_off, + FrameOffset handle_scope_offset, ManagedRegister mscratch, bool null_allowed) { X86ManagedRegister scratch = mscratch.AsX86(); CHECK(scratch.IsCpuRegister()); if (null_allowed) { Label null_arg; - movl(scratch.AsCpuRegister(), Address(ESP, sirt_offset)); + movl(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset)); testl(scratch.AsCpuRegister(), scratch.AsCpuRegister()); j(kZero, &null_arg); - leal(scratch.AsCpuRegister(), Address(ESP, sirt_offset)); + leal(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset)); Bind(&null_arg); } else { - leal(scratch.AsCpuRegister(), Address(ESP, sirt_offset)); + leal(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset)); } Store(out_off, scratch, 4); } -// Given a SIRT entry, load the associated reference. -void X86Assembler::LoadReferenceFromSirt(ManagedRegister mout_reg, +// Given a handle scope entry, load the associated reference. +void X86Assembler::LoadReferenceFromHandleScope(ManagedRegister mout_reg, ManagedRegister min_reg) { X86ManagedRegister out_reg = mout_reg.AsX86(); X86ManagedRegister in_reg = min_reg.AsX86(); |