Stack support for Optimizing compiler

Allows to read/write DEX registers from physical register or stack
location when the method is compiled with the Optimizing compiler.

Required fixing arm and arm64 JNI compiler by saving floating
point registers.

Bug: 18547544
Change-Id: I401579f251d1c0a130f6cf4a93a960cdcd7518f5

3 files changed, 30 insertions, 7 deletions

diff --git a/compiler/jni/quick/arm/calling_convention_arm.cc b/compiler/jni/quick/arm/calling_convention_arm.cc
index 669c3bb716..d3690b271f 100644
--- a/compiler/jni/quick/arm/calling_convention_arm.cc
+++ b/compiler/jni/quick/arm/calling_convention_arm.cc
@@ -31,6 +31,10 @@ static const SRegister kHFSArgumentRegisters[] = {
   S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15
 };
 
+static const SRegister kHFSCalleeSaveRegisters[] = {
+  S16, S17, S18, S19, S20, S21, S22, S23, S24, S25, S26, S27, S28, S29, S30, S31
+};
+
 static const DRegister kHFDArgumentRegisters[] = {
   D0, D1, D2, D3, D4, D5, D6, D7
 };
@@ -226,6 +230,10 @@ ArmJniCallingConvention::ArmJniCallingConvention(bool is_static, bool is_synchro
   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R8));
   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R10));
   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R11));
+
+  for (size_t i = 0; i < arraysize(kHFSCalleeSaveRegisters); ++i) {
+    callee_save_regs_.push_back(ArmManagedRegister::FromSRegister(kHFSCalleeSaveRegisters[i]));
+  }
 }
 
 uint32_t ArmJniCallingConvention::CoreSpillMask() const {
@@ -235,6 +243,14 @@ uint32_t ArmJniCallingConvention::CoreSpillMask() const {
   return result;
 }
 
+uint32_t ArmJniCallingConvention::FpSpillMask() const {
+  uint32_t result = 0;
+  for (size_t i = 0; i < arraysize(kHFSCalleeSaveRegisters); ++i) {
+    result |= (1 << kHFSCalleeSaveRegisters[i]);
+  }
+  return result;
+}
+
 ManagedRegister ArmJniCallingConvention::ReturnScratchRegister() const {
   return ArmManagedRegister::FromCoreRegister(R2);
 }
diff --git a/compiler/jni/quick/arm/calling_convention_arm.h b/compiler/jni/quick/arm/calling_convention_arm.h
index 604ce1c821..dbecb8eb95 100644
--- a/compiler/jni/quick/arm/calling_convention_arm.h
+++ b/compiler/jni/quick/arm/calling_convention_arm.h
@@ -63,9 +63,7 @@ class ArmJniCallingConvention FINAL : public JniCallingConvention {
   }
   ManagedRegister ReturnScratchRegister() const OVERRIDE;
   uint32_t CoreSpillMask() const OVERRIDE;
-  uint32_t FpSpillMask() const OVERRIDE {
-    return 0;  // Floats aren't spilled in JNI down call
-  }
+  uint32_t FpSpillMask() const OVERRIDE;
   bool IsCurrentParamInRegister() OVERRIDE;
   bool IsCurrentParamOnStack() OVERRIDE;
   ManagedRegister CurrentParamRegister() OVERRIDE;
diff --git a/compiler/jni/quick/arm64/calling_convention_arm64.cc b/compiler/jni/quick/arm64/calling_convention_arm64.cc
index b9c81787f0..05eb80a51a 100644
--- a/compiler/jni/quick/arm64/calling_convention_arm64.cc
+++ b/compiler/jni/quick/arm64/calling_convention_arm64.cc
@@ -38,6 +38,10 @@ static const SRegister kSArgumentRegisters[] = {
   S0, S1, S2, S3, S4, S5, S6, S7
 };
 
+static const DRegister kDCalleeSaveRegisters[] = {
+  D8, D9, D10, D11, D12, D13, D14, D15
+};
+
 // Calling convention
 ManagedRegister Arm64ManagedRuntimeCallingConvention::InterproceduralScratchRegister() {
   return Arm64ManagedRegister::FromXRegister(X20);  // saved on entry restored on exit
@@ -166,6 +170,10 @@ Arm64JniCallingConvention::Arm64JniCallingConvention(bool is_static, bool is_syn
   callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X28));
   callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X29));
   callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X30));
+
+  for (size_t i = 0; i < arraysize(kDCalleeSaveRegisters); ++i) {
+    callee_save_regs_.push_back(Arm64ManagedRegister::FromDRegister(kDCalleeSaveRegisters[i]));
+  }
 }
 
 uint32_t Arm64JniCallingConvention::CoreSpillMask() const {
@@ -184,10 +192,11 @@ uint32_t Arm64JniCallingConvention::CoreSpillMask() const {
 }
 
 uint32_t Arm64JniCallingConvention::FpSpillMask() const {
-  // Compute spill mask to agree with callee saves initialized in the constructor
-  // Note: All callee-save fp registers will be preserved by aapcs64. And they are not used
-  // in the jni method.
-  return 0;
+  uint32_t result = 0;
+  for (size_t i = 0; i < arraysize(kDCalleeSaveRegisters); ++i) {
+    result |= (1 << kDCalleeSaveRegisters[i]);
+  }
+  return result;
 }
 
 ManagedRegister Arm64JniCallingConvention::ReturnScratchRegister() const {