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authorIan Rogers <irogers@google.com>2014-08-22 23:14:27 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2014-08-22 23:14:27 +0000
commite18aa4316eb9a15cd6b1051f27a1ce49967c170e (patch)
tree2cf3b162acd637a6607c90ffb72f0e713d6bb507 /compiler/dex
parent02cdc91cae56a91e7833eae154fe9a7694103ae5 (diff)
parentd04d309276a6d35b34ff9805de3754299bbde4a9 (diff)
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Merge "ART: Support MIRGraph constant interface"
Diffstat (limited to 'compiler/dex')
-rw-r--r--compiler/dex/mir_graph.h29
-rw-r--r--compiler/dex/mir_optimization.cc4
2 files changed, 29 insertions, 4 deletions
diff --git a/compiler/dex/mir_graph.h b/compiler/dex/mir_graph.h
index 491d72e9e8..3de4e3d0f9 100644
--- a/compiler/dex/mir_graph.h
+++ b/compiler/dex/mir_graph.h
@@ -724,12 +724,39 @@ class MIRGraph {
return constant_values_[s_reg];
}
+ /**
+ * @brief Used to obtain 64-bit value of a pair of ssa registers.
+ * @param s_reg_low The ssa register representing the low bits.
+ * @param s_reg_high The ssa register representing the high bits.
+ * @return Retusn the 64-bit constant value.
+ */
+ int64_t ConstantValueWide(int32_t s_reg_low, int32_t s_reg_high) const {
+ DCHECK(IsConst(s_reg_low));
+ DCHECK(IsConst(s_reg_high));
+ return (static_cast<int64_t>(constant_values_[s_reg_high]) << 32) |
+ Low32Bits(static_cast<int64_t>(constant_values_[s_reg_low]));
+ }
+
int64_t ConstantValueWide(RegLocation loc) const {
DCHECK(IsConst(loc));
return (static_cast<int64_t>(constant_values_[loc.orig_sreg + 1]) << 32) |
Low32Bits(static_cast<int64_t>(constant_values_[loc.orig_sreg]));
}
+ /**
+ * @brief Used to mark ssa register as being constant.
+ * @param ssa_reg The ssa register.
+ * @param value The constant value of ssa register.
+ */
+ void SetConstant(int32_t ssa_reg, int32_t value);
+
+ /**
+ * @brief Used to mark ssa register and its wide counter-part as being constant.
+ * @param ssa_reg The ssa register.
+ * @param value The 64-bit constant value of ssa register and its pair.
+ */
+ void SetConstantWide(int32_t ssa_reg, int64_t value);
+
bool IsConstantNullRef(RegLocation loc) const {
return loc.ref && loc.is_const && (ConstantValue(loc) == 0);
}
@@ -1114,8 +1141,6 @@ class MIRGraph {
void MarkPreOrder(BasicBlock* bb);
void RecordDFSOrders(BasicBlock* bb);
void ComputeDomPostOrderTraversal(BasicBlock* bb);
- void SetConstant(int32_t ssa_reg, int value);
- void SetConstantWide(int ssa_reg, int64_t value);
int GetSSAUseCount(int s_reg);
bool BasicBlockOpt(BasicBlock* bb);
bool BuildExtendedBBList(struct BasicBlock* bb);
diff --git a/compiler/dex/mir_optimization.cc b/compiler/dex/mir_optimization.cc
index 6658848570..d37e9b6bdb 100644
--- a/compiler/dex/mir_optimization.cc
+++ b/compiler/dex/mir_optimization.cc
@@ -31,12 +31,12 @@ static unsigned int Predecessors(BasicBlock* bb) {
}
/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
-void MIRGraph::SetConstant(int32_t ssa_reg, int value) {
+void MIRGraph::SetConstant(int32_t ssa_reg, int32_t value) {
is_constant_v_->SetBit(ssa_reg);
constant_values_[ssa_reg] = value;
}
-void MIRGraph::SetConstantWide(int ssa_reg, int64_t value) {
+void MIRGraph::SetConstantWide(int32_t ssa_reg, int64_t value) {
is_constant_v_->SetBit(ssa_reg);
is_constant_v_->SetBit(ssa_reg + 1);
constant_values_[ssa_reg] = Low32Bits(value);