diff options
| author | Andreas Gampe <agampe@google.com> | 2014-05-15 11:16:06 -0700 |
|---|---|---|
| committer | Andreas Gampe <agampe@google.com> | 2014-05-15 12:32:44 -0700 |
| commit | b14329f90f725af0f67c45dfcb94933a426d63ce (patch) | |
| tree | eca2720bdc759d2e4b5058bc022f595303ebb971 /compiler/dex/quick/mips/target_mips.cc | |
| parent | 30b65201aa9c953433dbde1288e9b1b883042cd1 (diff) | |
| download | android_art-b14329f90f725af0f67c45dfcb94933a426d63ce.tar.gz android_art-b14329f90f725af0f67c45dfcb94933a426d63ce.tar.bz2 android_art-b14329f90f725af0f67c45dfcb94933a426d63ce.zip | |
ART: Fix MonitorExit code on ARM
We do not emit barriers on non-SMP systems. But on ARM, we have
places that need to conditionally execute, which is done through
an IT instruction. The guide of said instruction thus changes
between SMP and non-SMP systems.
To cleanly approach this, change the API so that GenMemBarrier
returns whether it generated an instruction. ARM will have to
query the result and update any dependent IT.
Throw a build system error if TARGET_CPU_SMP is not set.
Fix runtime/Android.mk to work with new multilib host.
Bug: 14989275
Change-Id: I9e611b770e8a1cd4ca19367d7dae0573ec08dc61
Diffstat (limited to 'compiler/dex/quick/mips/target_mips.cc')
| -rw-r--r-- | compiler/dex/quick/mips/target_mips.cc | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/compiler/dex/quick/mips/target_mips.cc b/compiler/dex/quick/mips/target_mips.cc index 2821209663..35345e8400 100644 --- a/compiler/dex/quick/mips/target_mips.cc +++ b/compiler/dex/quick/mips/target_mips.cc @@ -433,9 +433,12 @@ void MipsMir2Lir::FreeCallTemps() { FreeTemp(rs_rMIPS_ARG3); } -void MipsMir2Lir::GenMemBarrier(MemBarrierKind barrier_kind) { +bool MipsMir2Lir::GenMemBarrier(MemBarrierKind barrier_kind) { #if ANDROID_SMP != 0 NewLIR1(kMipsSync, 0 /* Only stype currently supported */); + return true; +#else + return false; #endif } |