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authorDavid Srbecky <dsrbecky@google.com>2015-04-07 20:21:06 +0100
committerDavid Srbecky <dsrbecky@google.com>2015-04-08 15:08:07 +0100
commit1109fb3cacc8bb667979780c2b4b12ce5bb64549 (patch)
tree00b38dbb7d7cf173bb376ed0b87d015dc09a6559 /compiler/dex/quick/mips/target_mips.cc
parentcde8e5da3e774a2494b051043130c0495eca09ef (diff)
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Implement CFI for Quick.
CFI is necessary for stack unwinding in gdb, lldb, and libunwind. Change-Id: Ic3b84c9dc91c4bae80e27cda02190f3274e95ae8
Diffstat (limited to 'compiler/dex/quick/mips/target_mips.cc')
-rw-r--r--compiler/dex/quick/mips/target_mips.cc8
1 files changed, 8 insertions, 0 deletions
diff --git a/compiler/dex/quick/mips/target_mips.cc b/compiler/dex/quick/mips/target_mips.cc
index a94fad7534..4c0bd8378b 100644
--- a/compiler/dex/quick/mips/target_mips.cc
+++ b/compiler/dex/quick/mips/target_mips.cc
@@ -830,6 +830,10 @@ LIR* MipsMir2Lir::GenAtomic64Store(RegStorage r_base, int displacement, RegStora
return OpReg(kOpBlx, r_tgt);
}
+static dwarf::Reg DwarfCoreReg(int num) {
+ return dwarf::Reg::MipsCore(num);
+}
+
void MipsMir2Lir::SpillCoreRegs() {
if (num_core_spills_ == 0) {
return;
@@ -839,11 +843,13 @@ void MipsMir2Lir::SpillCoreRegs() {
int offset = num_core_spills_ * ptr_size;
const RegStorage rs_sp = TargetPtrReg(kSp);
OpRegImm(kOpSub, rs_sp, offset);
+ cfi_.AdjustCFAOffset(offset);
for (int reg = 0; mask; mask >>= 1, reg++) {
if (mask & 0x1) {
offset -= ptr_size;
StoreWordDisp(rs_sp, offset,
cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg));
+ cfi_.RelOffset(DwarfCoreReg(reg), offset);
}
}
}
@@ -861,9 +867,11 @@ void MipsMir2Lir::UnSpillCoreRegs() {
offset -= ptr_size;
LoadWordDisp(rs_sp, offset,
cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg));
+ cfi_.Restore(DwarfCoreReg(reg));
}
}
OpRegImm(kOpAdd, rs_sp, frame_size_);
+ cfi_.AdjustCFAOffset(-frame_size_);
}
bool MipsMir2Lir::IsUnconditionalBranch(LIR* lir) {