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authorVladimir Marko <vmarko@google.com>2013-11-21 14:49:47 +0000
committerVladimir Marko <vmarko@google.com>2013-11-22 19:21:08 +0000
commit1c282e2b9a9b432e132b2c332f861cad9feb4a73 (patch)
tree963fe21b53fb671af762379b2820999d929c0f2d /compiler/dex/quick/mips/int_mips.cc
parentb6b4c459ef823ba62696796542519655c79423c2 (diff)
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Refactor intrinsic CAS, prepare for 64-bit version.
Bug: 11391018 Change-Id: Ic0f740e0cd0eb47f2c915f81be02f52f7721f8a3
Diffstat (limited to 'compiler/dex/quick/mips/int_mips.cc')
-rw-r--r--compiler/dex/quick/mips/int_mips.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/dex/quick/mips/int_mips.cc b/compiler/dex/quick/mips/int_mips.cc
index 52294290c9..dfff26062c 100644
--- a/compiler/dex/quick/mips/int_mips.cc
+++ b/compiler/dex/quick/mips/int_mips.cc
@@ -258,7 +258,7 @@ void MipsMir2Lir::OpTlsCmp(ThreadOffset offset, int val) {
LOG(FATAL) << "Unexpected use of OpTlsCmp for Arm";
}
-bool MipsMir2Lir::GenInlinedCas32(CallInfo* info, bool need_write_barrier) {
+bool MipsMir2Lir::GenInlinedCas(CallInfo* info, bool is_long, bool is_object) {
DCHECK_NE(cu_->instruction_set, kThumb2);
return false;
}