diff options
author | Ian Rogers <irogers@google.com> | 2014-09-29 18:31:02 +0000 |
---|---|---|
committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2014-09-29 18:31:02 +0000 |
commit | 1edf638010c4b15b87f865d180c3b95026827e9a (patch) | |
tree | bc752c9dd1f36cf0421e56c267e772e7c7ebf43f /compiler/dex/mir_analysis.cc | |
parent | f731a78809ac61a9085781370f0f38ef88305276 (diff) | |
parent | 750359753444498d509a756fa9a042e9f3c432df (diff) | |
download | android_art-1edf638010c4b15b87f865d180c3b95026827e9a.tar.gz android_art-1edf638010c4b15b87f865d180c3b95026827e9a.tar.bz2 android_art-1edf638010c4b15b87f865d180c3b95026827e9a.zip |
Merge "ART: Deprecate CompilationUnit's code_item"
Diffstat (limited to 'compiler/dex/mir_analysis.cc')
-rw-r--r-- | compiler/dex/mir_analysis.cc | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/compiler/dex/mir_analysis.cc b/compiler/dex/mir_analysis.cc index 6ef3cea6e6..ee48796996 100644 --- a/compiler/dex/mir_analysis.cc +++ b/compiler/dex/mir_analysis.cc @@ -1202,7 +1202,7 @@ bool MIRGraph::SkipCompilation(std::string* skip_message) { void MIRGraph::DoCacheFieldLoweringInfo() { // All IGET/IPUT/SGET/SPUT instructions take 2 code units and there must also be a RETURN. - const uint32_t max_refs = (current_code_item_->insns_size_in_code_units_ - 1u) / 2u; + const uint32_t max_refs = (GetNumDalvikInsns() - 1u) / 2u; ScopedArenaAllocator allocator(&cu_->arena_stack); uint16_t* field_idxs = reinterpret_cast<uint16_t*>(allocator.Alloc(max_refs * sizeof(uint16_t), kArenaAllocMisc)); @@ -1218,12 +1218,11 @@ void MIRGraph::DoCacheFieldLoweringInfo() { for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) { if (mir->dalvikInsn.opcode >= Instruction::IGET && mir->dalvikInsn.opcode <= Instruction::SPUT_SHORT) { - const Instruction* insn = Instruction::At(current_code_item_->insns_ + mir->offset); // Get field index and try to find it among existing indexes. If found, it's usually among // the last few added, so we'll start the search from ifield_pos/sfield_pos. Though this // is a linear search, it actually performs much better than map based approach. if (mir->dalvikInsn.opcode <= Instruction::IPUT_SHORT) { - uint16_t field_idx = insn->VRegC_22c(); + uint16_t field_idx = mir->dalvikInsn.vC; size_t i = ifield_pos; while (i != 0u && field_idxs[i - 1] != field_idx) { --i; @@ -1235,7 +1234,7 @@ void MIRGraph::DoCacheFieldLoweringInfo() { field_idxs[ifield_pos++] = field_idx; } } else { - uint16_t field_idx = insn->VRegB_21c(); + uint16_t field_idx = mir->dalvikInsn.vB; size_t i = sfield_pos; while (i != max_refs && field_idxs[i] != field_idx) { ++i; @@ -1315,7 +1314,7 @@ void MIRGraph::DoCacheMethodLoweringInfo() { ScopedArenaAllocator allocator(&cu_->arena_stack); // All INVOKE instructions take 3 code units and there must also be a RETURN. - uint32_t max_refs = (current_code_item_->insns_size_in_code_units_ - 1u) / 3u; + uint32_t max_refs = (GetNumDalvikInsns() - 1u) / 3u; // Map invoke key (see MapEntry) to lowering info index and vice versa. // The invoke_map and sequential entries are essentially equivalent to Boost.MultiIndex's @@ -1336,14 +1335,13 @@ void MIRGraph::DoCacheMethodLoweringInfo() { mir->dalvikInsn.opcode <= Instruction::INVOKE_INTERFACE_RANGE && mir->dalvikInsn.opcode != Instruction::RETURN_VOID_BARRIER) { // Decode target method index and invoke type. - const Instruction* insn = Instruction::At(current_code_item_->insns_ + mir->offset); uint16_t target_method_idx; uint16_t invoke_type_idx; if (mir->dalvikInsn.opcode <= Instruction::INVOKE_INTERFACE) { - target_method_idx = insn->VRegB_35c(); + target_method_idx = mir->dalvikInsn.vB; invoke_type_idx = mir->dalvikInsn.opcode - Instruction::INVOKE_VIRTUAL; } else { - target_method_idx = insn->VRegB_3rc(); + target_method_idx = mir->dalvikInsn.vB; invoke_type_idx = mir->dalvikInsn.opcode - Instruction::INVOKE_VIRTUAL_RANGE; } |