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author | Bill Buzbee <buzbee@android.com> | 2014-06-09 16:29:12 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2014-06-09 16:29:13 +0000 |
commit | 2e1ca953c7fb165da36cc26ea74d3045d7e272c8 (patch) | |
tree | 877fb2a2deb1036a84b0c0a81be4350855d5b8b9 | |
parent | fbc2b1747e7e3d06f214f801f53218a1d4bf2dbe (diff) | |
parent | 2d41a655f4f0e4b2178bbd7e93901a5ed6eae4a6 (diff) | |
download | android_art-2e1ca953c7fb165da36cc26ea74d3045d7e272c8.tar.gz android_art-2e1ca953c7fb165da36cc26ea74d3045d7e272c8.tar.bz2 android_art-2e1ca953c7fb165da36cc26ea74d3045d7e272c8.zip |
Merge "AArch64: Fix kOpLsl, rem-float/double."
-rw-r--r-- | compiler/dex/quick/arm64/fp_arm64.cc | 12 | ||||
-rw-r--r-- | compiler/dex/quick/arm64/utility_arm64.cc | 6 | ||||
-rw-r--r-- | compiler/dex/quick/gen_invoke.cc | 2 |
3 files changed, 15 insertions, 5 deletions
diff --git a/compiler/dex/quick/arm64/fp_arm64.cc b/compiler/dex/quick/arm64/fp_arm64.cc index acc7d17b56..265e8d2020 100644 --- a/compiler/dex/quick/arm64/fp_arm64.cc +++ b/compiler/dex/quick/arm64/fp_arm64.cc @@ -45,6 +45,7 @@ void Arm64Mir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest case Instruction::REM_FLOAT_2ADDR: case Instruction::REM_FLOAT: FlushAllRegs(); // Send everything to home location + // TODO: Fix xSELF. CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(8, pFmodf), rl_src1, rl_src2, false); rl_result = GetReturn(kFPReg); @@ -88,8 +89,15 @@ void Arm64Mir2Lir::GenArithOpDouble(Instruction::Code opcode, case Instruction::REM_DOUBLE_2ADDR: case Instruction::REM_DOUBLE: FlushAllRegs(); // Send everything to home location - CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(8, pFmod), rl_src1, rl_src2, - false); + // TODO: Fix xSELF. + { + ThreadOffset<8> helper_offset = QUICK_ENTRYPOINT_OFFSET(8, pFmod); + RegStorage r_tgt = CallHelperSetup(helper_offset); + LoadValueDirectWideFixed(rl_src1, rs_d0); + LoadValueDirectWideFixed(rl_src2, rs_d1); + ClobberCallerSave(); + CallHelper(r_tgt, helper_offset, false); + } rl_result = GetReturnWide(kFPReg); StoreValueWide(rl_dest, rl_result); return; diff --git a/compiler/dex/quick/arm64/utility_arm64.cc b/compiler/dex/quick/arm64/utility_arm64.cc index d0ab4f6844..4f0d7bc7d1 100644 --- a/compiler/dex/quick/arm64/utility_arm64.cc +++ b/compiler/dex/quick/arm64/utility_arm64.cc @@ -532,11 +532,11 @@ LIR* Arm64Mir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, switch (op) { case kOpLsl: { // "lsl w1, w2, #imm" is an alias of "ubfm w1, w2, #(-imm MOD 32), #(31-imm)" - // and "lsl x1, x2, #imm" of "ubfm x1, x2, #(-imm MOD 32), #(31-imm)". + // and "lsl x1, x2, #imm" of "ubfm x1, x2, #(-imm MOD 64), #(63-imm)". // For now, we just use ubfm directly. - int max_value = (is_wide) ? 64 : 32; + int max_value = (is_wide) ? 63 : 31; return NewLIR4(kA64Ubfm4rrdd | wide, r_dest.GetReg(), r_src1.GetReg(), - (-value) & (max_value - 1), max_value - value); + (-value) & max_value, max_value - value); } case kOpLsr: return NewLIR3(kA64Lsr3rrd | wide, r_dest.GetReg(), r_src1.GetReg(), value); diff --git a/compiler/dex/quick/gen_invoke.cc b/compiler/dex/quick/gen_invoke.cc index ee68fe2561..7a415a21f1 100644 --- a/compiler/dex/quick/gen_invoke.cc +++ b/compiler/dex/quick/gen_invoke.cc @@ -277,6 +277,8 @@ void Mir2Lir::CallRuntimeHelperRegLocationRegLocation(ThreadOffset<pointer_size> if (arg1.wide == 0) { if (cu_->instruction_set == kMips) { LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg2) : TargetReg(kArg1)); + } else if (cu_->instruction_set == kArm64) { + LoadValueDirectFixed(arg1, arg1.fp ? TargetReg(kFArg1) : TargetReg(kArg1)); } else { LoadValueDirectFixed(arg1, TargetReg(kArg1)); } |