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* plat: xilinx: zynqmp: Build for DDR if SPD is enabledSiva Durga Prasad Paladugu2018-06-211-1/+1
* zynqmp: Add wdt timeout restart functionalitySiva Durga Prasad Paladugu2018-05-171-0/+24
* zynqmp: Use DDR memory when DEBUG is enabledJolly Shah2018-03-151-0/+5
* Update ULL() macro and instances of ull to comply with MISRADavid Cunado2018-02-271-2/+2
* zynqmp: Migrate to using interrupt propertiesJeenu Viswambharan2017-10-171-12/+24
* Use SPDX license identifiersdp-arm2017-05-032-50/+2
* zynqmp: Migrate to new address space macrosSoren Brinkmann2017-01-061-1/+2
* zynqmp: Remove dead codeSoren Brinkmann2016-11-161-1/+0
* zynqmp: Increase MAX_XLAT_TABLESSoren Brinkmann2016-09-131-5/+1
* zynqmp: Change default BL31 address spaceSoren Brinkmann2016-09-131-2/+1
* zynqmp: Separate code and rodataSoren Brinkmann2016-07-111-1/+1
* zynqmp: Reduce mapped memory areaSoren Brinkmann2016-05-241-2/+6
* zynqmp: Revise memory configuration optionsSoren Brinkmann2016-04-251-36/+30
* Dump platform-defined regs in crash reportingGerald Lejeune2016-04-141-5/+6
* Add support for Xilinx Zynq UltraScale+ MPSOCSoren Brinkmann2016-04-062-0/+186
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