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* Add end_vector_entry assembler macroRoberto Vargas2018-07-114-80/+80
* cpulib: Add ISBs or comment why they are unneededDimitris Papastamos2018-06-194-0/+4
* Fix MISRA Rule 5.7 Part 1Daniel Boulby2018-06-121-4/+4
* Merge pull request #1397 from dp-arm/dp/cortex-a76Dimitris Papastamos2018-06-084-1/+461
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| * Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76Dimitris Papastamos2018-06-081-2/+241
| * Implement Cortex-Ares 1043202 erratum workaroundDimitris Papastamos2018-06-082-2/+74
| * Add AMU support for Cortex-AresDimitris Papastamos2018-06-082-4/+51
| * Add support for Cortex-Ares and Cortex-A76 CPUsIsla Mitchell2018-06-082-0/+102
* | Fast path SMCCC_ARCH_WORKAROUND_1 calls from AArch32Dimitris Papastamos2018-06-071-11/+12
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* Add support for dynamic mitigation for CVE-2018-3639Dimitris Papastamos2018-05-236-4/+42
* aarch32: Implement static workaround for CVE-2018-3639Dimitris Papastamos2018-05-232-0/+37
* Implement static workaround for CVE-2018-3639Dimitris Papastamos2018-05-235-0/+75
* Rename symbols and files relating to CVE-2017-5715Dimitris Papastamos2018-05-237-133/+133
* Workaround for CVE-2017-5715 on NVIDIA Denver CPUsVarun Wadekar2018-05-151-1/+144
* Check presence of fix for errata 835769 in Cortex-A53Jonathan Wright2018-04-121-2/+17
* Check presence of fix for errata 843419 in Cortex-A53Jonathan Wright2018-04-122-3/+22
* Fixup `SMCCC_ARCH_FEATURES` semanticsDimitris Papastamos2018-03-145-9/+42
* Use PFR0 to identify need for mitigation of CVE-2017-5715Dimitris Papastamos2018-03-143-18/+14
* MISRA fixes for Cortex A75 AMU implementationDimitris Papastamos2018-02-272-7/+7
* Refactor AMU support for Cortex A75Dimitris Papastamos2018-02-273-156/+78
* Factor out CPU AMU helpersDimitris Papastamos2018-02-271-0/+107
* Fixup AArch32 errata printing frameworkSoby Mathew2018-02-221-2/+3
* Merge pull request #1253 from dp-arm/dp/amu32davidcunado-arm2018-02-021-1/+1
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| * AMU: Implement context save/restore for aarch32Joel Hutton2018-01-311-1/+1
* | Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75Dimitris Papastamos2018-01-292-14/+67
* | Optimize/cleanup BPIALL workaroundDimitris Papastamos2018-01-291-121/+87
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* Merge pull request #1228 from dp-arm/dp/cve_2017_5715davidcunado-arm2018-01-2510-10/+223
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| * Workaround for CVE-2017-5715 for Cortex A9, A15 and A17Dimitris Papastamos2018-01-185-3/+125
| * Print erratum application report for CVE-2017-5715Dimitris Papastamos2018-01-184-5/+96
| * Change the default errata format stringDimitris Papastamos2018-01-181-2/+2
* | Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-rese...davidcunado-arm2018-01-201-1/+1
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| * | lib/cpus: fix branching in reset function for cortex-a72 AARCH32 modeManoj Kumar2018-01-191-1/+1
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* | Merge pull request #1200 from robertovargas-arm/bl2-el3davidcunado-arm2018-01-193-5/+7
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| * bl2-el3: Add BL2_EL3 imageRoberto Vargas2018-01-183-5/+7
* | Merge pull request #1197 from dp-arm/dp/amudavidcunado-arm2018-01-122-0/+173
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| * | Add hooks to save/restore AMU context for Cortex A75Dimitris Papastamos2018-01-112-0/+173
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* | Use PFR0 to identify need for mitigation of CVE-2017-5915Dimitris Papastamos2018-01-111-0/+10
* | Workaround for CVE-2017-5715 on Cortex A73 and A75Dimitris Papastamos2018-01-113-0/+382
* | Workaround for CVE-2017-5715 on Cortex A57 and A72Dimitris Papastamos2018-01-114-0/+130
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* Merge pull request #1168 from matt2048/masterdavidcunado-arm2017-12-043-6/+6
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| * Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONSMatt Ma2017-11-233-6/+6
* | Implement support for the Activity Monitor Unit on Cortex A75Dimitris Papastamos2017-11-291-1/+28
* | ARMv7: introduce Cortex-A12Etienne Carriere2017-11-081-0/+75
* | ARMv7: introduce Cortex-A17Etienne Carriere2017-11-081-0/+75
* | ARMv7: introduce Cortex-A7Etienne Carriere2017-11-081-0/+75
* | ARMv7: introduce Cortex-A5Etienne Carriere2017-11-081-0/+75
* | ARMv7: introduce Cortex-A9Etienne Carriere2017-11-081-0/+75
* | ARMv7: introduce Cortex-A15Etienne Carriere2017-11-081-0/+81
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* Cortex-A72: Implement workaround for erratum 859971Eleanor Bonnici2017-09-073-2/+119
* Cortex-A57: Implement workaround for erratum 859972Eleanor Bonnici2017-09-073-0/+71
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