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* tzc380: Fix some assertsAntonio Nino Diaz2018-12-051-3/+3
| | | | | | | | | This driver can be compiled in release builds, but GCC generates warnings for some comparisons and that prevents the firmware from being built in debug builds. Change-Id: Ic52e1b4a11896ecf086864fbe2b5bfc143ec9b1b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1653 from JackyBai/masterAntonio Niño Díaz2018-12-051-0/+103
|\ | | | | Add NXP i.MX8MQ basic support
| * drivers: add tzc380 supportPeng Fan2018-12-041-0/+103
| | | | | | | | | | | | | | Add tzc380 support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com>
* | Merge pull request #1702 from MISL-EBU-System-SW/patches-18.12Antonio Niño Díaz2018-12-044-11/+170
|\ \ | |/ |/| Update code with latest changes from Marvell LSP 18.12
| * ble: ap807: Switch to PLL mode and update CPU frequencyChristine Gharzuzi2018-12-041-0/+101
| | | | | | | | | | | | | | | | | | - Update CPU frequency on AP807 to 2GHz for SAR 0x0. - Increase AVS to 0.88V for 2GHz clock Change-Id: Ic945b682ab2f8543e34294bfc56c3eae2c5e0c8e Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
| * mvebu: cp110: avoid pcie power on/off sequence when called from LinuxIgal Liberman2018-12-043-9/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Armada 8K DB boards, PCIe initialization can be executed only once because PCIe reset performed during chip power on and it cannot be executed via GPIO later. This means that power on can be executed only once, when it's called from the bootloader. Power on: Read bit 21 of the mode, it marks if the caller is the bootloader or the Linux Kernel. Power off: Check if the comphy was already configured to PCIe, if yes, check if the caller is bootloader, if both conditions are true (PCIe mode and called by Linux) - skip the power-off. In addition, fix incorrect documentation describing mode fields - PCIe width is 3 bits, not 2. NOTE: with this patch, please use LK4.14.76 (LK4.4.120 may not work with it). Change-Id: I4b929011f97a0a1869a51ba378687e78b3eca4ff Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
| * mvebu: cp110: fix phy selector configuration for XFI1Grzegorz Jaszczyk2018-12-041-2/+2
| | | | | | | | | | | | | | | | Extended phy selector configuration about XFI1 mode. Change-Id: I1309770bbb5fdbfb0127b6f12ee78974d1d6b19f Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
* | Merge pull request #1698 from hzhuang1/rm_emmc_delayAntonio Niño Díaz2018-11-291-0/+7
|\ \ | | | | | | Rm emmc delay
| * | mmc: poll eMMC status after EXT_CSD commandHaojian Zhuang2018-11-261-0/+7
| |/ | | | | | | | | | | | | | | EXT_CSD command needs to access data from eMMC device. Add the operation of polling eMMC device status. Make sure the command is finished. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
* | Merge pull request #1679 from pangupta/masterAntonio Niño Díaz2018-11-291-0/+121
|\ \ | |/ |/| ccn: Introduce API to set and read value of node register
| * ccn: Introduce API to set and read value of node registerPankaj Gupta2018-11-231-0/+121
| | | | | | | | Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
* | drivers/tzc-dmc620: add driver to setup DMC-620 TZC controllerVijayenthiran Subramaniam2018-11-211-0/+175
| | | | | | | | | | | | | | | | | | | | ARM CoreLink DMC-620 Dynamic Memory Controller includes a TZC controller to setup secure or non-secure regions of DRAM memory. The TZC controller allows to setup upto eight such regions of memory in DRAM. This driver provides helper functions to setup the TZC controller within DMC-620. Change-Id: Iee7692417c2080052bdb7b1c2873a024bc5d1d10 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
* | Merge pull request #1682 from MISL-EBU-System-SW/migrate-multi-consoleAntonio Niño Díaz2018-11-192-75/+105
|\ \ | | | | | | Marvell: Migrate to multi console API
| * | plat/marvell: Migrate to multi-console APIKonstantin Porotchkin2018-11-152-75/+105
| | | | | | | | | | | | | | | | | | | | | | | | Migrate Marvell platforms from legacy console API to multi-console API. Change-Id: I647f5f49148b463a257a747af05b5f0c967f267c Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* | | drivers: st: uart: remove old APIYann Gautier2018-11-151-11/+0
| | | | | | | | | | | | | | | | | | | | | Now that MULTI_CONSOLE_API is enabled for the STM32MP1 platform, we can remove the non MULTI_CONSOLE_API parts in the driver. Signed-off-by: Yann Gautier <yann.gautier@st.com>
* | | drivers: st: update console driver to support MULTI_CONSOLE_APIYann Gautier2018-11-151-12/+109
| | | | | | | | | | | | Signed-off-by: Yann Gautier <yann.gautier@st.com>
* | | stm32mp1: add a new file for UART registers definitionYann Gautier2018-11-151-17/+1
|/ / | | | | | | Signed-off-by: Yann Gautier <yann.gautier@st.com>
* | Merge pull request #1676 from Yann-lms/static_analysisAntonio Nino Diaz2018-11-133-8/+12
|\ \ | | | | | | | | | Correct some issues found with static analysis tools
| * | stm32mp1: correct some static analysis tools issuesYann Gautier2018-11-092-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These issues wer found by sparse: drivers/st/clk/stm32mp1_clk.c:1524:19: warning: incorrect type in assignment (different base types) expected restricted fdt32_t const [usertype] *pkcs_cell got unsigned int const [usertype] * plat/st/stm32mp1/plat_image_load.c:13:6: warning: symbol 'plat_flush_next_bl_params' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:21:16: warning: symbol 'plat_get_bl_image_load_info' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:29:13: warning: symbol 'plat_get_next_bl_params' was not declared. Should it be static? plat/st/stm32mp1/bl2_io_storage.c:40:10: warning: symbol 'block_buffer' was not declared. Should it be static? Signed-off-by: Yann Gautier <yann.gautier@st.com>
| * | drivers: partition: correct some static analysis tools issuesYann Gautier2018-11-091-3/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | cppcheck: [drivers/partition/gpt.c:19] -> [drivers/partition/gpt.c:19]: (warning) Either the condition 'str_in!=((void*)0)' is redundant or there is possible null pointer dereference: name. sparse: drivers/partition/gpt.c:39:9: warning: Using plain integer as NULL pointer Signed-off-by: Yann Gautier <yann.gautier@st.com>
* / cadence: uart: comply to console_register prototypeAlexei Colin2018-11-121-4/+6
|/ | | | Signed-off-by: Alexei Colin <acolin@isi.edu>
* Standardise header guards across codebaseAntonio Nino Diaz2018-11-0853-166/+163
| | | | | | | | | | | | | | | | | | All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1668 from ldts/rcar_gen3/e3_buildSoby Mathew2018-11-073-6/+6
|\ | | | | rcar_gen3: E3 target: fix compilation issues
| * rcar_gen3: E3 target: fix compilation issuesldts2018-11-063-6/+6
| | | | | | | | | | | | Target builds but has not been tested. Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com>
* | Remove _tzc_get_max_top_addr() functionSandrine Bailleux2018-11-063-38/+3
|/ | | | | | | | | This function was needed at the time where we didn't have the compiler_rt lib. An AArch32-specific variant was provided to handle the 64-bit shift operation in 32-bit. This is no longer needed. Change-Id: Ibab709a95e3a723ae2eeaddf873dba70ff2012b3 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
* Merge pull request #1623 from MISL-EBU-System-SW/a3700-supportAntonio Niño Díaz2018-11-019-286/+2230
|\ | | | | Add support for Armada 3700 and COMPHY porting layer
| * drivers: marvell Add support for Armada-37xx UARTKonstantin Porotchkin2018-10-222-0/+223
| | | | | | | | | | | | Introduce driver for Marvell Armada-37xx UART console Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
| * drivers: marvell Add Armada-37xx COMPHY driverKonstantin Porotchkin2018-10-222-0/+1233
| | | | | | | | | | | | | | Add support for Marvell Armada-3700 COMPHY driver Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
| * mvebu: cp110: introduce COMPHY porting layerGrzegorz Jaszczyk2018-10-185-286/+774
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of COMPHY parameters depends on the hw connection between the SoC and the PHY, which can vary on different boards e.g. due to different wires length. Define the "porting layer" with some defaults parameters. It ease updating static values which needs to be updated due to board differences, which are now grouped in one place. Example porting layer for a8k-db is under: plat/marvell/a8k/a80x0/board/phy-porting-layer.h If for some boards parameters are not defined (missing phy-porting-layer.h), the default values are used (drivers/marvell/comphy/phy-default-porting-layer.h) and the following compilation warning is show: "Using default comphy params - you may need to suit them to your board". The common COMPHY driver code is extracted in order to be shared with future COMPHY driver for A3700 SoC platforms Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* | Merge pull request #1646 from Andre-ARM/allwinner/pmic-v2Antonio Niño Díaz2018-10-311-0/+136
|\ \ | | | | | | Allwinner/pmic v2
| * | allwinner: Add RSB driverAndre Przywara2018-10-201-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "Reduced Serial Bus" is an Allwinner specific bus, bearing many similarities with I2C. It sports a much higher bus frequency, though, (typically 3 MHz) and requires much less handholding for the typical task of manipulating slave registers (fire-and-forget). On most A64 boards this bus is used to connect the PMIC to the SoC. This driver provides basic primitives to read and write slave registers, it will be later used by the PMIC code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | | meson: console: Add missing define to fix buildAntonio Nino Diaz2018-10-291-0/+1
| | | | | | | | | | | | | | | | | | | | | It isn't possible to build this driver without adding this define. Change-Id: Iba2ced411cd8ce438787871fa01b414d32b9aa42 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | | meson: console: Introduce console driverAntonio Nino Diaz2018-10-261-0/+263
| | | | | | | | | | | | | | | | | | | | | | | | It has only been tested with a system clock of 24 MHz. It has only been implemented for the multi console API. Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | | Merge pull request #1640 from soby-mathew/sm/fin_con_regAntonio Niño Díaz2018-10-256-7/+18
|\ \ \ | | | | | | | | Multi-console: Deprecate the `finish_console_register` macro
| * | | Multi-console: Deprecate the `finish_console_register` macroSoby Mathew2018-10-196-7/+18
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `finish_console_register` macro is used by the multi console framework to register the `console_t` driver callbacks. It relied on weak references to the `ldr` instruction to populate 0 to the callback in case the driver has not defined the appropriate function. Use of `ldr` instruction to load absolute address to a reference makes the binary position dependant. These instructions should be replaced with adrp/adr instruction for position independant executable(PIE). But adrp/adr instructions don't work well with weak references as described in GNU ld bugzilla issue 22589. This patch defines a new version of `finish_console_register` macro which can spcify which driver callbacks are valid and deprecates the old one. If any of the argument is not specified, then the macro populates 0 for that callback. Hence the functionality of the previous deprecated macro is preserved. The USE_FINISH_CONSOLE_REG_2 define is used to select the new variant of the macro and will be removed once the deprecated variant is removed. All the upstream console drivers have been migrated to use the new macro in this patch. NOTE: Platforms be aware that the new variant of the `finish_console_register` should be used and the old variant is deprecated. Change-Id: Ia6a67aaf2aa3ba93932992d683587bbd0ad25259 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* / / tzc: Fix MISRA defectsAntonio Nino Diaz2018-10-233-70/+72
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been fixed. The types tzc_region_attributes_t and tzc_action_t have been removed and replaced by unsigned int because it is not allowed to do logical operations on enums. Also, fix some address definitions in arm_def.h. Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | Merge pull request #1632 from Yann-lms/stm32mp1_mmcSoby Mathew2018-10-183-0/+1245
|\ \ | |/ |/| Add MMC support for STM32MP1
| * stm32mp1: add an IO to read MMC devicesYann Gautier2018-10-151-0/+126
| | | | | | | | | | | | | | | | Whereas the GPT table is read with io_block, the binaries to be loaded (e.g. BL33) cannot use it, as it is not suitable to read them block by block, or the boot time would be very bad. Signed-off-by: Yann Gautier <yann.gautier@st.com>
| * stm32mp1: add an IO to read STM32IMAGE binariesYann Gautier2018-10-151-0/+384
| | | | | | | | | | | | | | This IO is required to read binaries with STM32 header. This header is added with the stm32image tool. Signed-off-by: Yann Gautier <yann.gautier@st.com>
| * stm32mp1: add sdmmc2 driverYann Gautier2018-10-151-0/+735
| | | | | | | | | | | | | | | | This driver is for the STMicroelectronics sdmmc2 IP which is in STM32MP1 SoC. It uses the MMC framework, and can address either eMMC or SD-card. Signed-off-by: Yann Gautier <yann.gautier@st.com>
* | rcar_gen3: drivers: watchdogJorge Ramirez-Ortiz2018-10-171-0/+158
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: serial controller interfaceJorge Ramirez-Ortiz2018-10-171-0/+329
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: spi multio bus controllerJorge Ramirez-Ortiz2018-10-172-0/+59
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: rom apiJorge Ramirez-Ortiz2018-10-172-0/+124
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: power controllerJorge Ramirez-Ortiz2018-10-173-0/+957
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: consoleJorge Ramirez-Ortiz2018-10-173-0/+210
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: io [emmc/mem]Jorge Ramirez-Ortiz2018-10-178-0/+1035
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: i2c dvfsJorge Ramirez-Ortiz2018-10-172-0/+591
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: emmcJorge Ramirez-Ortiz2018-10-1711-0/+3073
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
* | rcar_gen3: drivers: dmaJorge Ramirez-Ortiz2018-10-171-0/+147
| | | | | | | | Signed-off-by: ldts <jramirez@baylibre.com>
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