| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Use correct type when reading SCR register | Louis Mayencourt | 2020-01-28 | 1 | -10/+10 |
| * | Sanitise includes across codebase | Antonio Nino Diaz | 2019-01-04 | 1 | -4/+5 |
| * | Fix MISRA defects in BL31 common code | Antonio Nino Diaz | 2018-08-30 | 1 | -21/+21 |
| * | Use SPDX license identifiers | dp-arm | 2017-05-03 | 1 | -25/+1 |
| * | Enable support for EL3 interrupt in IMF | Soby Mathew | 2015-12-09 | 1 | -8/+8 |
| * | IMF: postpone SCR_EL3 update if context is not initialized | Juan Castillo | 2015-11-05 | 1 | -1/+6 |
| * | Demonstrate model for routing IRQs to EL3 | Soby Mathew | 2015-01-26 | 1 | -0/+39 |
| * | Rework incorrect use of assert() and panic() in codebase | Juan Castillo | 2014-07-28 | 1 | -1/+1 |
| * | Introduce interrupt registration framework in BL3-1 | Achin Gupta | 2014-05-22 | 1 | -0/+206 |
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index : platform_external_arm-trusted-firmware | |
| Unnamed repository; edit this file 'description' to name the repository. |
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