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* PIE: make call to GDT relocation fixup generalizedManish Pandey2019-12-121-1/+2
* TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2UAlexei Fedorov2019-10-031-0/+9
* Merge changes from topic "db/unsigned_long" into integrationSandrine Bailleux2019-09-181-2/+2
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| * Unsigned long should not be used as per coding guidelinesDeepika Bhavnani2019-09-131-2/+2
* | Refactor ARMv8.3 Pointer Authentication support codeAlexei Fedorov2019-09-132-24/+12
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* AArch64: Disable Secure Cycle CounterAlexei Fedorov2019-08-211-1/+9
* Refactor SPSR initialisation codeJohn Tsichritzis2019-07-241-13/+6
* BL1: Enable pointer authentication supportAntonio Nino Diaz2019-02-271-12/+30
* Sanitise includes across codebaseAntonio Nino Diaz2019-01-042-6/+8
* context_mgmt: Fix MISRA defectsAntonio Nino Diaz2018-11-011-4/+4
* Add end_vector_entry assembler macroRoberto Vargas2018-07-111-16/+16
* Rename 'smcc' to 'smccc'Antonio Nino Diaz2018-03-211-2/+2
* Ensure the correct execution of TLBI instructionsAntonio Nino Diaz2018-02-211-0/+1
* Fix order of #includesIsla Mitchell2017-07-121-1/+1
* Merge pull request #978 from etienne-lms/minor-builddanh-arm2017-06-282-0/+2
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| * bl1: include bl1_private.h in aarch* filesEtienne Carriere2017-06-232-0/+2
* | Fully initialise essential control registersDavid Cunado2017-06-211-2/+2
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* Merge pull request #927 from jeenu-arm/state-switchdavidcunado-arm2017-05-111-6/+4
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| * Add macro to check whether the CPU implements an ELJeenu Viswambharan2017-05-021-6/+4
* | Use SPDX license identifiersdp-arm2017-05-034-100/+4
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* Define and use no_ret macro where no return is expectedJeenu Viswambharan2016-12-051-16/+16
* AArch32: Add generic changes in BL1Yatharth Kochar2016-09-212-3/+127
* Remove looping around `plat_report_exception`Yatharth Kochar2016-08-221-17/+16
* Introduce some helper macros for exception vectorsSandrine Bailleux2016-05-261-39/+22
* Enable asynchronous abort exceptions during bootGerald Lejeune2016-03-301-1/+1
* FWU: Add Generic Firmware Update framework support in BL1Yatharth Kochar2015-12-091-11/+89
* Add descriptor based image management support in BL1Yatharth Kochar2015-12-092-6/+21
* Move context management code to common locationYatharth Kochar2015-12-091-2/+1
* Introduce COLD_BOOT_SINGLE_CPU build optionSandrine Bailleux2015-11-261-1/+1
* Pass the entry point info to bl1_plat_prepare_exit()Sandrine Bailleux2015-11-261-0/+1
* Introduce SPIN_ON_BL1_EXIT build flagSandrine Bailleux2015-11-261-0/+6
* Improve display_boot_progress() functionSandrine Bailleux2015-11-021-1/+1
* Add optional bl1_plat_prepare_exit() APIJuan Castillo2015-10-201-0/+2
* Break down BL1 AArch64 synchronous exception handlerSandrine Bailleux2015-10-191-44/+49
* Introduce PROGRAMMABLE_RESET_ADDRESS build optionSandrine Bailleux2015-06-041-1/+7
* Rationalize reset handling codeSandrine Bailleux2015-06-041-112/+9
* Add support to indicate size and end of assembly functionsKévin Petit2015-04-081-0/+1
* Remove coherent memory from the BL memory mapsSoby Mathew2015-01-221-0/+2
* Miscellaneous documentation fixesSandrine Bailleux2014-08-271-4/+4
* Introduce framework for CPU specific operationsSoby Mathew2014-08-201-1/+1
* Unmask SError interrupt and clear SCR_EL3.EA bitAchin Gupta2014-08-153-11/+13
* Simplify management of SCTLR_EL3 and SCTLR_EL1Achin Gupta2014-07-282-15/+8
* Remove coherent stack usage from the cold boot pathAchin Gupta2014-07-191-14/+8
* Merge pull request #151 from vikramkanigiri/vk/t133-code-readabilityAndrew Thoelke2014-06-271-7/+3
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| * Simplify entry point information generation code on FVPVikram Kanigiri2014-06-241-7/+3
* | Remove all checkpatch errors from codebaseJuan Castillo2014-06-241-1/+2
* | Initialise CPU contexts from entry_point_infoAndrew Thoelke2014-06-231-4/+3
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* Add support for BL3-1 as a reset vectorVikram Kanigiri2014-05-221-34/+40
* Populate BL31 input parameters as per new specVikram Kanigiri2014-05-221-6/+6
* Rework handover interface between BL stagesVikram Kanigiri2014-05-221-56/+41
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