diff options
Diffstat (limited to 'plat')
-rw-r--r-- | plat/arm/board/fvp/include/plat.ld.S | 11 | ||||
-rw-r--r-- | plat/arm/board/fvp/platform.mk | 3 | ||||
-rw-r--r-- | plat/arm/common/arm_tzc400.c | 2 | ||||
-rw-r--r-- | plat/arm/common/arm_tzc_dmc500.c | 2 |
4 files changed, 16 insertions, 2 deletions
diff --git a/plat/arm/board/fvp/include/plat.ld.S b/plat/arm/board/fvp/include/plat.ld.S new file mode 100644 index 000000000..24c3debd9 --- /dev/null +++ b/plat/arm/board/fvp/include/plat.ld.S @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef __PLAT_LD_S__ +#define __PLAT_LD_S__ + +#include <arm_common.ld.S> + +#endif /* __PLAT_LD_S__ */ diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index 29da12eea..1b502967a 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -155,5 +155,8 @@ ifeq (${ARCH},aarch32) NEED_BL32 := yes endif +# Add support for platform supplied linker script for BL31 build +$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) + include plat/arm/board/common/board_common.mk include plat/arm/common/arm_common.mk diff --git a/plat/arm/common/arm_tzc400.c b/plat/arm/common/arm_tzc400.c index 1d61c576f..e19ca673f 100644 --- a/plat/arm/common/arm_tzc400.c +++ b/plat/arm/common/arm_tzc400.c @@ -40,7 +40,7 @@ void arm_tzc400_setup(void) /* Region 1 set to cover Secure part of DRAM */ tzc400_configure_region(PLAT_ARM_TZC_FILTERS, 1, - ARM_AP_TZC_DRAM1_BASE, ARM_AP_TZC_DRAM1_END, + ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, TZC_REGION_S_RDWR, 0); diff --git a/plat/arm/common/arm_tzc_dmc500.c b/plat/arm/common/arm_tzc_dmc500.c index 21ca4e8d5..8e41391f5 100644 --- a/plat/arm/common/arm_tzc_dmc500.c +++ b/plat/arm/common/arm_tzc_dmc500.c @@ -33,7 +33,7 @@ void arm_tzc_dmc500_setup(tzc_dmc500_driver_data_t *plat_driver_data) /* Region 1 set to cover Secure part of DRAM */ tzc_dmc500_configure_region(1, ARM_AP_TZC_DRAM1_BASE, - ARM_AP_TZC_DRAM1_END, + ARM_EL3_TZC_DRAM1_END, TZC_REGION_S_RDWR, 0); |