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-rw-r--r--plat/ti/k3/board/generic/board.mk7
-rw-r--r--plat/ti/k3/board/lite/board.mk24
-rw-r--r--plat/ti/k3/board/lite/include/board_def.h34
-rw-r--r--plat/ti/k3/common/drivers/sec_proxy/sec_proxy.c14
-rw-r--r--plat/ti/k3/common/drivers/sec_proxy/sec_proxy.h15
-rw-r--r--plat/ti/k3/common/drivers/ti_sci/ti_sci.c1
-rw-r--r--plat/ti/k3/common/drivers/ti_sci/ti_sci_protocol.h3
-rw-r--r--plat/ti/k3/common/k3_bl31_setup.c34
-rw-r--r--plat/ti/k3/common/k3_console.c2
-rw-r--r--plat/ti/k3/common/k3_helpers.S6
-rw-r--r--plat/ti/k3/common/k3_psci.c8
-rw-r--r--plat/ti/k3/common/plat_common.mk17
-rw-r--r--plat/ti/k3/include/platform_def.h20
-rw-r--r--plat/ti/k3/platform.mk2
14 files changed, 173 insertions, 14 deletions
diff --git a/plat/ti/k3/board/generic/board.mk b/plat/ti/k3/board/generic/board.mk
index a34221454..ef74cd64c 100644
--- a/plat/ti/k3/board/generic/board.mk
+++ b/plat/ti/k3/board/generic/board.mk
@@ -13,5 +13,12 @@ $(eval $(call add_define,PRELOADED_BL33_BASE))
K3_HW_CONFIG_BASE ?= 0x82000000
$(eval $(call add_define,K3_HW_CONFIG_BASE))
+# Define sec_proxy usage as the full prioritized communication scheme
+K3_SEC_PROXY_LITE := 0
+$(eval $(call add_define,K3_SEC_PROXY_LITE))
+
+# System coherency is managed in hardware
+USE_COHERENT_MEM := 1
+
PLAT_INCLUDES += \
-Iplat/ti/k3/board/generic/include \
diff --git a/plat/ti/k3/board/lite/board.mk b/plat/ti/k3/board/lite/board.mk
new file mode 100644
index 000000000..76246be47
--- /dev/null
+++ b/plat/ti/k3/board/lite/board.mk
@@ -0,0 +1,24 @@
+#
+# Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+BL32_BASE ?= 0x9e800000
+$(eval $(call add_define,BL32_BASE))
+
+PRELOADED_BL33_BASE ?= 0x80080000
+$(eval $(call add_define,PRELOADED_BL33_BASE))
+
+K3_HW_CONFIG_BASE ?= 0x82000000
+$(eval $(call add_define,K3_HW_CONFIG_BASE))
+
+# Define sec_proxy usage as the lite version
+K3_SEC_PROXY_LITE := 1
+$(eval $(call add_define,K3_SEC_PROXY_LITE))
+
+# We dont have system level coherency capability
+USE_COHERENT_MEM := 0
+
+PLAT_INCLUDES += \
+ -Iplat/ti/k3/board/lite/include \
diff --git a/plat/ti/k3/board/lite/include/board_def.h b/plat/ti/k3/board/lite/include/board_def.h
new file mode 100644
index 000000000..7c7ea62c1
--- /dev/null
+++ b/plat/ti/k3/board/lite/include/board_def.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef BOARD_DEF_H
+#define BOARD_DEF_H
+
+#include <lib/utils_def.h>
+
+/* The ports must be in order and contiguous */
+#define K3_CLUSTER0_CORE_COUNT U(4)
+#define K3_CLUSTER1_CORE_COUNT U(0)
+#define K3_CLUSTER2_CORE_COUNT U(0)
+#define K3_CLUSTER3_CORE_COUNT U(0)
+
+/*
+ * This RAM will be used for the bootloader including code, bss, and stacks.
+ * It may need to be increased if BL31 grows in size.
+ * Current computation assumes data structures necessary for GIC and ARM for
+ * a single cluster of 4 processor.
+ */
+#define SEC_SRAM_BASE 0x70000000 /* Base of SRAM */
+#define SEC_SRAM_SIZE 0x0001a000 /* 104k */
+
+#define PLAT_MAX_OFF_STATE U(2)
+#define PLAT_MAX_RET_STATE U(1)
+
+#define PLAT_PROC_START_ID 32
+#define PLAT_PROC_DEVICE_START_ID 135
+#define PLAT_CLUSTER_DEVICE_START_ID 134
+
+#endif /* BOARD_DEF_H */
diff --git a/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.c b/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.c
index ee1eecf78..a0bfdee36 100644
--- a/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.c
+++ b/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.c
@@ -97,11 +97,16 @@ static struct k3_sec_proxy_mbox spm = {
.data_end_offset = 0x3C,
},
.threads = {
+#if !K3_SEC_PROXY_LITE
SP_THREAD(SP_NOTIFY),
SP_THREAD(SP_RESPONSE),
SP_THREAD(SP_HIGH_PRIORITY),
SP_THREAD(SP_LOW_PRIORITY),
SP_THREAD(SP_NOTIFY_RESP),
+#else
+ SP_THREAD(SP_RESPONSE),
+ SP_THREAD(SP_HIGH_PRIORITY),
+#endif /* K3_SEC_PROXY_LITE */
},
};
@@ -261,9 +266,14 @@ int k3_sec_proxy_send(enum k3_sec_proxy_chan_id id, const struct k3_sec_proxy_ms
/*
* 'data_reg' indicates next register to write. If we did not already
* write on tx complete reg(last reg), we must do so for transmit
+ * In addition, we also need to make sure all intermediate data
+ * registers(if any required), are reset to 0 for TISCI backward
+ * compatibility to be maintained.
*/
- if (data_reg <= spm.desc.data_end_offset)
- mmio_write_32(spt->data + spm.desc.data_end_offset, 0);
+ while (data_reg <= spm.desc.data_end_offset) {
+ mmio_write_32(spt->data + data_reg, 0);
+ data_reg += sizeof(uint32_t);
+ }
VERBOSE("Message successfully sent on thread %s\n", spt->name);
diff --git a/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.h b/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.h
index 6c4f5dfff..f4b0b4bac 100644
--- a/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.h
+++ b/plat/ti/k3/common/drivers/sec_proxy/sec_proxy.h
@@ -16,13 +16,28 @@
* enum k3_sec_proxy_chan_id - Secure Proxy thread IDs
*
* These the available IDs used in k3_sec_proxy_{send,recv}()
+ * There are two schemes we use:
+ * * if K3_SEC_PROXY_LITE = 1, we just have two threads to talk
+ * * if K3_SEC_PROXY_LITE = 0, we have the full fledged
+ * communication scheme available.
*/
enum k3_sec_proxy_chan_id {
+#if !K3_SEC_PROXY_LITE
SP_NOTIFY = 0,
SP_RESPONSE,
SP_HIGH_PRIORITY,
SP_LOW_PRIORITY,
SP_NOTIFY_RESP,
+#else
+ SP_RESPONSE = 8,
+ /*
+ * Note: TISCI documentation indicates "low priority", but in reality
+ * with a single thread, there is no low or high priority.. This usage
+ * is more appropriate for TF-A since we can reduce the churn as a
+ * result.
+ */
+ SP_HIGH_PRIORITY,
+#endif /* K3_SEC_PROXY_LITE */
};
/**
diff --git a/plat/ti/k3/common/drivers/ti_sci/ti_sci.c b/plat/ti/k3/common/drivers/ti_sci/ti_sci.c
index e390efee6..2c3313c43 100644
--- a/plat/ti/k3/common/drivers/ti_sci/ti_sci.c
+++ b/plat/ti/k3/common/drivers/ti_sci/ti_sci.c
@@ -1163,6 +1163,7 @@ int ti_sci_core_reboot(void)
ERROR("Message alloc failed (%d)\n", ret);
return ret;
}
+ req.domain = TI_SCI_DOMAIN_FULL_SOC_RESET;
ret = ti_sci_do_xfer(&xfer);
if (ret) {
diff --git a/plat/ti/k3/common/drivers/ti_sci/ti_sci_protocol.h b/plat/ti/k3/common/drivers/ti_sci/ti_sci_protocol.h
index 2d23f9a9c..310bf459d 100644
--- a/plat/ti/k3/common/drivers/ti_sci/ti_sci_protocol.h
+++ b/plat/ti/k3/common/drivers/ti_sci/ti_sci_protocol.h
@@ -95,12 +95,15 @@ struct ti_sci_msg_resp_version {
/**
* struct ti_sci_msg_req_reboot - Reboot the SoC
* @hdr: Generic Header
+ * @domain: Domain to be reset, 0 for full SoC reboot
*
* Request type is TI_SCI_MSG_SYS_RESET, responded with a generic
* ACK/NACK message.
*/
struct ti_sci_msg_req_reboot {
struct ti_sci_msg_hdr hdr;
+#define TI_SCI_DOMAIN_FULL_SOC_RESET 0x0
+ uint8_t domain;
} __packed;
/**
diff --git a/plat/ti/k3/common/k3_bl31_setup.c b/plat/ti/k3/common/k3_bl31_setup.c
index 8bd736292..ac4e60e4d 100644
--- a/plat/ti/k3/common/k3_bl31_setup.c
+++ b/plat/ti/k3/common/k3_bl31_setup.c
@@ -13,6 +13,7 @@
#include <arch_helpers.h>
#include <common/bl_common.h>
#include <common/debug.h>
+#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <k3_console.h>
@@ -23,6 +24,7 @@
const mmap_region_t plat_k3_mmap[] = {
MAP_REGION_FLAT(K3_USART_BASE, K3_USART_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(K3_GIC_BASE, K3_GIC_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
+ MAP_REGION_FLAT(K3_GTC_BASE, K3_GTC_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(SEC_PROXY_RT_BASE, SEC_PROXY_RT_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(SEC_PROXY_SCFG_BASE, SEC_PROXY_SCFG_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
MAP_REGION_FLAT(SEC_PROXY_DATA_BASE, SEC_PROXY_DATA_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
@@ -127,6 +129,38 @@ void platform_mem_init(void)
unsigned int plat_get_syscnt_freq2(void)
{
+ uint32_t gtc_freq;
+ uint32_t gtc_ctrl;
+
+ /* Lets try and provide basic diagnostics - cost is low */
+ gtc_ctrl = mmio_read_32(K3_GTC_BASE + K3_GTC_CNTCR_OFFSET);
+ /* Did the bootloader fail to enable timer and OS guys are confused? */
+ if ((gtc_ctrl & K3_GTC_CNTCR_EN_MASK) == 0U) {
+ ERROR("GTC is disabled! Timekeeping broken. Fix Bootloader\n");
+ }
+ /*
+ * If debug will not pause time, we will have issues like
+ * drivers timing out while debugging, in cases of OS like Linux,
+ * RCU stall errors, which can be hard to differentiate vs real issues.
+ */
+ if ((gtc_ctrl & K3_GTC_CNTCR_HDBG_MASK) == 0U) {
+ WARN("GTC: Debug access doesn't stop time. Fix Bootloader\n");
+ }
+
+ gtc_freq = mmio_read_32(K3_GTC_BASE + K3_GTC_CNTFID0_OFFSET);
+ /* Many older bootloaders may have missed programming FID0 register */
+ if (gtc_freq != 0U) {
+ return gtc_freq;
+ }
+
+ /*
+ * We could have just warned about this, but this can have serious
+ * hard to debug side effects if we are NOT sure what the actual
+ * frequency is. Lets make sure people don't miss this.
+ */
+ ERROR("GTC_CNTFID0 is 0! Assuming %d Hz. Fix Bootloader\n",
+ SYS_COUNTER_FREQ_IN_TICKS);
+
return SYS_COUNTER_FREQ_IN_TICKS;
}
diff --git a/plat/ti/k3/common/k3_console.c b/plat/ti/k3/common/k3_console.c
index ba0ddacec..8c44c17e2 100644
--- a/plat/ti/k3/common/k3_console.c
+++ b/plat/ti/k3/common/k3_console.c
@@ -13,7 +13,7 @@
void bl31_console_setup(void)
{
- static console_16550_t console;
+ static console_t console;
/* Initialize the console to provide early debug support */
console_16550_register(K3_USART_BASE, K3_USART_CLK_SPEED,
diff --git a/plat/ti/k3/common/k3_helpers.S b/plat/ti/k3/common/k3_helpers.S
index 3afca591e..f4f7d18ea 100644
--- a/plat/ti/k3/common/k3_helpers.S
+++ b/plat/ti/k3/common/k3_helpers.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -141,10 +141,10 @@ func plat_crash_console_putc
endfunc plat_crash_console_putc
/* ---------------------------------------------
- * int plat_crash_console_flush()
+ * void plat_crash_console_flush()
* Function to force a write of all buffered
* data that hasn't been output.
- * Out : return -1 on error else return 0.
+ * Out : void.
* Clobber list : x0, x1
* ---------------------------------------------
*/
diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c
index d6ed7667e..050074007 100644
--- a/plat/ti/k3/common/k3_psci.c
+++ b/plat/ti/k3/common/k3_psci.c
@@ -203,6 +203,13 @@ void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
k3_gic_cpuif_enable();
}
+static void __dead2 k3_system_off(void)
+{
+ ERROR("System Off: operation not handled.\n");
+ while (true)
+ wfi();
+}
+
static void __dead2 k3_system_reset(void)
{
/* Send the system reset request to system firmware */
@@ -232,6 +239,7 @@ static const plat_psci_ops_t k3_plat_psci_ops = {
.pwr_domain_on = k3_pwr_domain_on,
.pwr_domain_off = k3_pwr_domain_off,
.pwr_domain_on_finish = k3_pwr_domain_on_finish,
+ .system_off = k3_system_off,
.system_reset = k3_system_reset,
.validate_power_state = k3_validate_power_state,
.validate_ns_entrypoint = k3_validate_ns_entrypoint
diff --git a/plat/ti/k3/common/plat_common.mk b/plat/ti/k3/common/plat_common.mk
index 7956497ae..ab7366b7e 100644
--- a/plat/ti/k3/common/plat_common.mk
+++ b/plat/ti/k3/common/plat_common.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -11,9 +11,8 @@ COLD_BOOT_SINGLE_CPU := 1
# We can choose where a core starts executing
PROGRAMMABLE_RESET_ADDRESS:= 1
-# System coherency is managed in hardware
+# ARM coherency is managed in hardware
WARMBOOT_ENABLE_DCACHE_EARLY := 1
-USE_COHERENT_MEM := 1
# A53 erratum for SoC. (enable them all)
ERRATA_A53_826319 := 1
@@ -21,9 +20,11 @@ ERRATA_A53_835769 := 1
ERRATA_A53_836870 := 1
ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1
+ERRATA_A53_1530924 := 1
# A72 Erratum for SoC
ERRATA_A72_859971 := 1
+ERRATA_A72_1319367 := 1
CRASH_REPORTING := 1
HANDLE_EA_EL3_FIRST := 1
@@ -37,6 +38,9 @@ ENABLE_PIE := 1
TI_16550_MDR_QUIRK := 1
$(eval $(call add_define,TI_16550_MDR_QUIRK))
+K3_USART := 0
+$(eval $(call add_define,K3_USART))
+
# Allow customizing the UART baud rate
K3_USART_BAUD := 115200
$(eval $(call add_define,K3_USART_BAUD))
@@ -53,10 +57,11 @@ K3_CONSOLE_SOURCES += \
drivers/ti/uart/aarch64/16550_console.S \
${PLAT_PATH}/common/k3_console.c \
+# Include GICv3 driver files
+include drivers/arm/gic/v3/gicv3.mk
+
K3_GIC_SOURCES += \
- drivers/arm/gic/common/gic_common.c \
- drivers/arm/gic/v3/gicv3_main.c \
- drivers/arm/gic/v3/gicv3_helpers.c \
+ ${GICV3_SOURCES} \
plat/common/plat_gicv3.c \
${PLAT_PATH}/common/k3_gicv3.c \
diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h
index 690c68e5c..f12fb0b21 100644
--- a/plat/ti/k3/include/platform_def.h
+++ b/plat/ti/k3/include/platform_def.h
@@ -91,7 +91,7 @@
/* Platform default console definitions */
#ifndef K3_USART_BASE
-#define K3_USART_BASE 0x02800000
+#define K3_USART_BASE (0x02800000 + 0x10000 * K3_USART)
#endif
/* USART has a default size for address space */
@@ -150,15 +150,33 @@
INTR_PROP_DESC(ARM_IRQ_SEC_SGI_6, GIC_HIGHEST_SEC_PRIORITY, grp, \
GIC_INTR_CFG_EDGE)
+
+#define K3_GTC_BASE 0x00A90000
+/* We just need 20 byte offset, but simpler to just remap the 64K page in */
+#define K3_GTC_SIZE 0x10000
+#define K3_GTC_CNTCR_OFFSET 0x00
+#define K3_GTC_CNTCR_EN_MASK 0x01
+#define K3_GTC_CNTCR_HDBG_MASK 0x02
+#define K3_GTC_CNTFID0_OFFSET 0x20
+
#define K3_GIC_BASE 0x01800000
#define K3_GIC_SIZE 0x200000
+#if !K3_SEC_PROXY_LITE
#define SEC_PROXY_DATA_BASE 0x32C00000
#define SEC_PROXY_DATA_SIZE 0x80000
#define SEC_PROXY_SCFG_BASE 0x32800000
#define SEC_PROXY_SCFG_SIZE 0x80000
#define SEC_PROXY_RT_BASE 0x32400000
#define SEC_PROXY_RT_SIZE 0x80000
+#else
+#define SEC_PROXY_DATA_BASE 0x4D000000
+#define SEC_PROXY_DATA_SIZE 0x80000
+#define SEC_PROXY_SCFG_BASE 0x4A400000
+#define SEC_PROXY_SCFG_SIZE 0x80000
+#define SEC_PROXY_RT_BASE 0x4A600000
+#define SEC_PROXY_RT_SIZE 0x80000
+#endif /* K3_SEC_PROXY_LITE */
#define SEC_PROXY_TIMEOUT_US 1000000
#define SEC_PROXY_MAX_MESSAGE_SIZE 56
diff --git a/plat/ti/k3/platform.mk b/plat/ti/k3/platform.mk
index 65d5cc2a4..2de21aa7b 100644
--- a/plat/ti/k3/platform.mk
+++ b/plat/ti/k3/platform.mk
@@ -11,4 +11,4 @@ include ${PLAT_PATH}/common/plat_common.mk
include ${PLAT_PATH}/board/${TARGET_BOARD}/board.mk
# modify BUILD_PLAT to point to board specific build directory
-BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_BOARD}/${BUILD_TYPE}
+BUILD_PLAT := $(abspath ${BUILD_BASE})/${PLAT}/${TARGET_BOARD}/${BUILD_TYPE}
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-14 16:33:20 +0000