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-rw-r--r--plat/imx/common/include/imx_caam.h3
-rw-r--r--plat/imx/common/include/imx_snvs.h3
-rw-r--r--plat/imx/common/include/sci/sci_ipc.h4
-rw-r--r--plat/imx/common/plat_imx8_gic.c4
-rw-r--r--plat/imx/common/sci/ipc.c4
-rw-r--r--plat/imx/imx7/picopi/include/platform_def.h8
-rw-r--r--plat/imx/imx7/warp7/include/platform_def.h8
-rw-r--r--plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c12
-rw-r--r--plat/imx/imx8m/imx8mm/include/platform_def.h11
-rw-r--r--plat/imx/imx8m/imx8mm/platform.mk6
-rw-r--r--plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c12
-rw-r--r--plat/imx/imx8m/imx8mq/include/platform_def.h11
-rw-r--r--plat/imx/imx8m/imx8mq/platform.mk6
-rw-r--r--plat/imx/imx8m/include/imx8m_psci.h4
-rw-r--r--plat/imx/imx8qm/imx8qm_bl31_setup.c13
-rw-r--r--plat/imx/imx8qm/include/platform_def.h12
-rw-r--r--plat/imx/imx8qx/imx8qx_bl31_setup.c13
-rw-r--r--plat/imx/imx8qx/include/platform_def.h14
18 files changed, 91 insertions, 57 deletions
diff --git a/plat/imx/common/include/imx_caam.h b/plat/imx/common/include/imx_caam.h
index 335bd0f8b..61005b51c 100644
--- a/plat/imx/common/include/imx_caam.h
+++ b/plat/imx/common/include/imx_caam.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,6 +7,7 @@
#ifndef IMX_CAAM_H
#define IMX_CAAM_H
+#include <cdefs.h>
#include <stdint.h>
#include <arch.h>
#include <imx_regs.h>
diff --git a/plat/imx/common/include/imx_snvs.h b/plat/imx/common/include/imx_snvs.h
index 0b3d1085f..565c451dd 100644
--- a/plat/imx/common/include/imx_snvs.h
+++ b/plat/imx/common/include/imx_snvs.h
@@ -1,11 +1,12 @@
/*
- * Copyright (C) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (C) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef IMX_SNVS_H
#define IMX_SNVS_H
+#include <cdefs.h>
#include <stdint.h>
#include <arch.h>
diff --git a/plat/imx/common/include/sci/sci_ipc.h b/plat/imx/common/include/sci/sci_ipc.h
index 1167ea367..39e9012bc 100644
--- a/plat/imx/common/include/sci/sci_ipc.h
+++ b/plat/imx/common/include/sci/sci_ipc.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -62,6 +62,6 @@ void sc_ipc_read(sc_ipc_t ipc, void *data);
*/
void sc_ipc_write(sc_ipc_t ipc, void *data);
-sc_ipc_t ipc_handle;
+extern sc_ipc_t ipc_handle;
#endif /* SCI_IPC_H */
diff --git a/plat/imx/common/plat_imx8_gic.c b/plat/imx/common/plat_imx8_gic.c
index 3a7dcfec6..afb9d1f1a 100644
--- a/plat/imx/common/plat_imx8_gic.c
+++ b/plat/imx/common/plat_imx8_gic.c
@@ -20,9 +20,7 @@
uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
static const interrupt_prop_t g01s_interrupt_props[] = {
- INTR_PROP_DESC(6, GIC_HIGHEST_SEC_PRIORITY,
- INTR_GROUP1S, GIC_INTR_CFG_LEVEL),
- INTR_PROP_DESC(7, GIC_HIGHEST_SEC_PRIORITY,
+ INTR_PROP_DESC(8, GIC_HIGHEST_SEC_PRIORITY,
INTR_GROUP0, GIC_INTR_CFG_LEVEL),
};
diff --git a/plat/imx/common/sci/ipc.c b/plat/imx/common/sci/ipc.c
index 6491ca575..576911925 100644
--- a/plat/imx/common/sci/ipc.c
+++ b/plat/imx/common/sci/ipc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,6 +13,8 @@
#include <sci/sci_rpc.h>
#include "imx8_mu.h"
+sc_ipc_t ipc_handle;
+
DEFINE_BAKERY_LOCK(sc_ipc_bakery_lock);
#define sc_ipc_lock_init() bakery_lock_init(&sc_ipc_bakery_lock)
#define sc_ipc_lock() bakery_lock_get(&sc_ipc_bakery_lock)
diff --git a/plat/imx/imx7/picopi/include/platform_def.h b/plat/imx/imx7/picopi/include/platform_def.h
index 1af1d0cfc..141571c67 100644
--- a/plat/imx/imx7/picopi/include/platform_def.h
+++ b/plat/imx/imx7/picopi/include/platform_def.h
@@ -13,15 +13,15 @@
#define PLATFORM_STACK_SIZE 0x1000
-#define PLATFORM_MAX_CPUS_PER_CLUSTER 2
-#define PLATFORM_CLUSTER_COUNT 1
+#define PLATFORM_MAX_CPUS_PER_CLUSTER U(2)
+#define PLATFORM_CLUSTER_COUNT U(1)
#define PLATFORM_CLUSTER0_CORE_COUNT PLATFORM_MAX_CPUS_PER_CLUSTER
#define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT
-#define PICOPI_PRIMARY_CPU 0
+#define PICOPI_PRIMARY_CPU U(0)
-#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \
+#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \
PLATFORM_CORE_COUNT)
#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1
diff --git a/plat/imx/imx7/warp7/include/platform_def.h b/plat/imx/imx7/warp7/include/platform_def.h
index 4f719083e..4afcb5497 100644
--- a/plat/imx/imx7/warp7/include/platform_def.h
+++ b/plat/imx/imx7/warp7/include/platform_def.h
@@ -13,15 +13,15 @@
#define PLATFORM_STACK_SIZE 0x1000
-#define PLATFORM_MAX_CPUS_PER_CLUSTER 2
-#define PLATFORM_CLUSTER_COUNT 1
+#define PLATFORM_MAX_CPUS_PER_CLUSTER U(2)
+#define PLATFORM_CLUSTER_COUNT U(1)
#define PLATFORM_CLUSTER0_CORE_COUNT PLATFORM_MAX_CPUS_PER_CLUSTER
-#define PLATFORM_CLUSTER1_CORE_COUNT 0
+#define PLATFORM_CLUSTER1_CORE_COUNT U(0)
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT + \
PLATFORM_CLUSTER1_CORE_COUNT)
-#define WARP7_PRIMARY_CPU 0
+#define WARP7_PRIMARY_CPU U(0)
#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \
PLATFORM_CORE_COUNT)
diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
index c3cd0d0cb..4c5f4f0d1 100644
--- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
+++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c
@@ -124,6 +124,18 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
bl33_image_ep_info.spsr = get_spsr_for_bl33_entry();
SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
+#ifdef SPD_opteed
+ /* Populate entry point information for BL32 */
+ SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
+ SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
+ bl32_image_ep_info.pc = BL32_BASE;
+ bl32_image_ep_info.spsr = 0;
+
+ /* Pass TEE base and size to bl33 */
+ bl33_image_ep_info.args.arg1 = BL32_BASE;
+ bl33_image_ep_info.args.arg2 = BL32_SIZE;
+#endif
+
bl31_tzc380_setup();
}
diff --git a/plat/imx/imx8m/imx8mm/include/platform_def.h b/plat/imx/imx8m/imx8mm/include/platform_def.h
index de9e3b5c8..56caab7ce 100644
--- a/plat/imx/imx8m/imx8mm/include/platform_def.h
+++ b/plat/imx/imx8m/imx8mm/include/platform_def.h
@@ -10,11 +10,11 @@
#define PLATFORM_STACK_SIZE 0xB00
#define CACHE_WRITEBACK_GRANULE 64
-#define PLAT_PRIMARY_CPU 0x0
-#define PLATFORM_MAX_CPU_PER_CLUSTER 4
-#define PLATFORM_CLUSTER_COUNT 1
-#define PLATFORM_CLUSTER0_CORE_COUNT 4
-#define PLATFORM_CLUSTER1_CORE_COUNT 0
+#define PLAT_PRIMARY_CPU U(0x0)
+#define PLATFORM_MAX_CPU_PER_CLUSTER U(4)
+#define PLATFORM_CLUSTER_COUNT U(1)
+#define PLATFORM_CLUSTER0_CORE_COUNT U(4)
+#define PLATFORM_CLUSTER1_CORE_COUNT U(0)
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT)
#define IMX_PWR_LVL0 MPIDR_AFFLVL0
@@ -31,7 +31,6 @@
#define BL31_BASE U(0x920000)
#define BL31_LIMIT U(0x940000)
-#define BL32_BASE U(0xbe000000)
/* non-secure uboot base */
#define PLAT_NS_IMAGE_OFFSET U(0x40200000)
diff --git a/plat/imx/imx8m/imx8mm/platform.mk b/plat/imx/imx8m/imx8mm/platform.mk
index 6d32dbba3..c0cb6c2a5 100644
--- a/plat/imx/imx8m/imx8mm/platform.mk
+++ b/plat/imx/imx8m/imx8mm/platform.mk
@@ -45,3 +45,9 @@ A53_DISABLE_NON_TEMPORAL_HINT := 0
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1
+
+BL32_BASE ?= 0xbe000000
+$(eval $(call add_define,BL32_BASE))
+
+BL32_SIZE ?= 0x2000000
+$(eval $(call add_define,BL32_SIZE))
diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
index 26a3b364e..a347389a2 100644
--- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
+++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c
@@ -146,6 +146,18 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
bl33_image_ep_info.spsr = get_spsr_for_bl33_entry();
SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
+#ifdef SPD_opteed
+ /* Populate entry point information for BL32 */
+ SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
+ SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
+ bl32_image_ep_info.pc = BL32_BASE;
+ bl32_image_ep_info.spsr = 0;
+
+ /* Pass TEE base and size to bl33 */
+ bl33_image_ep_info.args.arg1 = BL32_BASE;
+ bl33_image_ep_info.args.arg2 = BL32_SIZE;
+#endif
+
bl31_tz380_setup();
}
diff --git a/plat/imx/imx8m/imx8mq/include/platform_def.h b/plat/imx/imx8m/imx8mq/include/platform_def.h
index 3c212e378..9db3a137a 100644
--- a/plat/imx/imx8m/imx8mq/include/platform_def.h
+++ b/plat/imx/imx8m/imx8mq/include/platform_def.h
@@ -10,11 +10,11 @@
#define PLATFORM_STACK_SIZE 0x800
#define CACHE_WRITEBACK_GRANULE 64
-#define PLAT_PRIMARY_CPU 0x0
-#define PLATFORM_MAX_CPU_PER_CLUSTER 4
-#define PLATFORM_CLUSTER_COUNT 1
-#define PLATFORM_CLUSTER0_CORE_COUNT 4
-#define PLATFORM_CLUSTER1_CORE_COUNT 0
+#define PLAT_PRIMARY_CPU U(0x0)
+#define PLATFORM_MAX_CPU_PER_CLUSTER U(4)
+#define PLATFORM_CLUSTER_COUNT U(1)
+#define PLATFORM_CLUSTER0_CORE_COUNT U(4)
+#define PLATFORM_CLUSTER1_CORE_COUNT U(0)
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT)
#define IMX_PWR_LVL0 MPIDR_AFFLVL0
@@ -32,7 +32,6 @@
#define BL31_BASE U(0x910000)
#define BL31_LIMIT U(0x920000)
-#define BL32_BASE U(0xfe000000)
/* non-secure uboot base */
#define PLAT_NS_IMAGE_OFFSET U(0x40200000)
diff --git a/plat/imx/imx8m/imx8mq/platform.mk b/plat/imx/imx8m/imx8mq/platform.mk
index 44ce55587..80ebe4062 100644
--- a/plat/imx/imx8m/imx8mq/platform.mk
+++ b/plat/imx/imx8m/imx8mq/platform.mk
@@ -44,3 +44,9 @@ A53_DISABLE_NON_TEMPORAL_HINT := 0
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1
+
+BL32_BASE ?= 0xfe000000
+$(eval $(call add_define,BL32_BASE))
+
+BL32_SIZE ?= 0x2000000
+$(eval $(call add_define,BL32_SIZE))
diff --git a/plat/imx/imx8m/include/imx8m_psci.h b/plat/imx/imx8m/include/imx8m_psci.h
index 496640383..c33d25e82 100644
--- a/plat/imx/imx8m/include/imx8m_psci.h
+++ b/plat/imx/imx8m/include/imx8m_psci.h
@@ -15,13 +15,9 @@ int imx_pwr_domain_on(u_register_t mpidr);
void imx_pwr_domain_on_finish(const psci_power_state_t *target_state);
void imx_pwr_domain_off(const psci_power_state_t *target_state);
int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint);
-int imx_validate_power_state(unsigned int power_state, psci_power_state_t *rq_state);
void imx_cpu_standby(plat_local_state_t cpu_state);
void imx_domain_suspend(const psci_power_state_t *target_state);
void imx_domain_suspend_finish(const psci_power_state_t *target_state);
-void imx_get_sys_suspend_power_state(psci_power_state_t *req_state);
-void __dead2 imx_system_reset(void);
-void __dead2 imx_system_off(void);
void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state);
#endif /* IMX8M_PSCI_H */
diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c
index c76de6461..9232cbc2d 100644
--- a/plat/imx/imx8qm/imx8qm_bl31_setup.c
+++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -27,12 +27,13 @@
#include <sci/sci.h>
#include <sec_rsrc.h>
-IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL31_COHERENT_RAM_START);
-IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL31_COHERENT_RAM_END);
-IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_START);
-IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_END);
+static const unsigned long BL31_COHERENT_RAM_START = BL_COHERENT_RAM_BASE;
+static const unsigned long BL31_COHERENT_RAM_END = BL_COHERENT_RAM_END;
+static const unsigned long BL31_RO_START = BL_CODE_BASE;
+static const unsigned long BL31_RO_END = BL_CODE_END;
+static const unsigned long BL31_RW_END = BL_END;
+
IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);
-IMPORT_SYM(unsigned long, __RW_END__, BL31_RW_END);
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
diff --git a/plat/imx/imx8qm/include/platform_def.h b/plat/imx/imx8qm/include/platform_def.h
index 138a4e1d3..b54943da0 100644
--- a/plat/imx/imx8qm/include/platform_def.h
+++ b/plat/imx/imx8qm/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -15,11 +15,11 @@
#define PLATFORM_STACK_SIZE 0X400
#define CACHE_WRITEBACK_GRANULE 64
-#define PLAT_PRIMARY_CPU 0x0
-#define PLATFORM_MAX_CPU_PER_CLUSTER 4
-#define PLATFORM_CLUSTER_COUNT 2
-#define PLATFORM_CLUSTER0_CORE_COUNT 4
-#define PLATFORM_CLUSTER1_CORE_COUNT 2
+#define PLAT_PRIMARY_CPU U(0x0)
+#define PLATFORM_MAX_CPU_PER_CLUSTER U(4)
+#define PLATFORM_CLUSTER_COUNT U(2)
+#define PLATFORM_CLUSTER0_CORE_COUNT U(4)
+#define PLATFORM_CLUSTER1_CORE_COUNT U(2)
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT + \
PLATFORM_CLUSTER1_CORE_COUNT)
diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c
index bfe405284..58c82ce60 100644
--- a/plat/imx/imx8qx/imx8qx_bl31_setup.c
+++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -27,12 +27,13 @@
#include <sci/sci.h>
#include <sec_rsrc.h>
-IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL31_COHERENT_RAM_START);
-IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL31_COHERENT_RAM_END);
-IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_START);
-IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_END);
+static const unsigned long BL31_COHERENT_RAM_START = BL_COHERENT_RAM_BASE;
+static const unsigned long BL31_COHERENT_RAM_END = BL_COHERENT_RAM_END;
+static const unsigned long BL31_RO_START = BL_CODE_BASE;
+static const unsigned long BL31_RO_END = BL_CODE_END;
+static const unsigned long BL31_RW_END = BL_END;
+
IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START);
-IMPORT_SYM(unsigned long, __RW_END__, BL31_RW_END);
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
diff --git a/plat/imx/imx8qx/include/platform_def.h b/plat/imx/imx8qx/include/platform_def.h
index 108627f66..41475ffeb 100644
--- a/plat/imx/imx8qx/include/platform_def.h
+++ b/plat/imx/imx8qx/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -15,12 +15,12 @@
#define PLATFORM_STACK_SIZE 0x400
#define CACHE_WRITEBACK_GRANULE 64
-#define PLAT_PRIMARY_CPU 0x0
-#define PLATFORM_MAX_CPU_PER_CLUSTER 4
-#define PLATFORM_CLUSTER_COUNT 1
-#define PLATFORM_CORE_COUNT 4
-#define PLATFORM_CLUSTER0_CORE_COUNT 4
-#define PLATFORM_CLUSTER1_CORE_COUNT 0
+#define PLAT_PRIMARY_CPU U(0x0)
+#define PLATFORM_MAX_CPU_PER_CLUSTER U(4)
+#define PLATFORM_CLUSTER_COUNT U(1)
+#define PLATFORM_CORE_COUNT U(4)
+#define PLATFORM_CLUSTER0_CORE_COUNT U(4)
+#define PLATFORM_CLUSTER1_CORE_COUNT U(0)
#define PWR_DOMAIN_AT_MAX_LVL U(1)
#define PLAT_MAX_PWR_LVL U(2)
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-16 03:55:08 +0000