diff options
Diffstat (limited to 'plat/arm/board/fvp/fvp_def.h')
| -rw-r--r-- | plat/arm/board/fvp/fvp_def.h | 33 |
1 files changed, 28 insertions, 5 deletions
diff --git a/plat/arm/board/fvp/fvp_def.h b/plat/arm/board/fvp/fvp_def.h index 347ba2e1e..831eb35b7 100644 --- a/plat/arm/board/fvp/fvp_def.h +++ b/plat/arm/board/fvp/fvp_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -27,6 +27,11 @@ #define FVP_CCI 1 #define FVP_CCN 2 +/****************************************************************************** + * Definition of platform soc id + *****************************************************************************/ +#define FVP_SOC_ID 0 + /******************************************************************************* * FVP memory map related constants ******************************************************************************/ @@ -52,8 +57,18 @@ #define DEVICE1_BASE UL(0x2e000000) #define DEVICE1_SIZE UL(0x1A00000) #else -#define DEVICE1_BASE UL(0x2f000000) -#define DEVICE1_SIZE UL(0x200000) +#define DEVICE1_BASE BASE_GICD_BASE + +#if GIC_ENABLE_V4_EXTN +/* GICv4 mapping: GICD + CORE_COUNT * 256KB */ +#define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \ + (PLATFORM_CORE_COUNT * 0x40000)) +#else +/* GICv2 and GICv3 mapping: GICD + CORE_COUNT * 128KB */ +#define DEVICE1_SIZE ((BASE_GICR_BASE - BASE_GICD_BASE) + \ + (PLATFORM_CORE_COUNT * 0x20000)) +#endif /* GIC_ENABLE_V4_EXTN */ + #define NSRAM_BASE UL(0x2e000000) #define NSRAM_SIZE UL(0x10000) #endif @@ -110,7 +125,7 @@ #define FVP_SP810_CTRL_TIM3_OV BIT_32(22) /******************************************************************************* - * GIC-400 & interrupt handling related constants + * GIC & interrupt handling related constants ******************************************************************************/ /* VE compatible GIC memory map */ #define VE_GICD_BASE UL(0x2c001000) @@ -120,7 +135,16 @@ /* Base FVP compatible GIC memory map */ #define BASE_GICD_BASE UL(0x2f000000) +#define BASE_GICD_SIZE UL(0x10000) #define BASE_GICR_BASE UL(0x2f100000) + +#if GIC_ENABLE_V4_EXTN +/* GICv4 redistributor size: 256KB */ +#define BASE_GICR_SIZE UL(0x40000) +#else +#define BASE_GICR_SIZE UL(0x20000) +#endif /* GIC_ENABLE_V4_EXTN */ + #define BASE_GICC_BASE UL(0x2c000000) #define BASE_GICH_BASE UL(0x2c010000) #define BASE_GICV_BASE UL(0x2c02f000) @@ -128,7 +152,6 @@ #define FVP_IRQ_TZ_WDOG 56 #define FVP_IRQ_SEC_SYS_TIMER 57 - /******************************************************************************* * TrustZone address space controller related constants ******************************************************************************/ |