diff options
Diffstat (limited to 'plat/allwinner/common/sunxi_common.c')
| -rw-r--r-- | plat/allwinner/common/sunxi_common.c | 23 |
1 files changed, 7 insertions, 16 deletions
diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c index 3759c285e..5b536a043 100644 --- a/plat/allwinner/common/sunxi_common.c +++ b/plat/allwinner/common/sunxi_common.c @@ -21,11 +21,13 @@ static const mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = { MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE, MT_RW_DATA | MT_SECURE), + MAP_REGION_FLAT(SUNXI_SCP_BASE, SUNXI_SCP_SIZE, + MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE, MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE, MT_RW_DATA | MT_SECURE), - MAP_REGION(PLAT_SUNXI_NS_IMAGE_OFFSET, + MAP_REGION(PRELOADED_BL33_BASE, SUNXI_DRAM_VIRT_BASE + SUNXI_DRAM_SEC_SIZE, SUNXI_DRAM_MAP_SIZE, MT_RO_DATA | MT_NS), @@ -37,15 +39,6 @@ unsigned int plat_get_syscnt_freq2(void) return SUNXI_OSC24M_CLK_IN_HZ; } -uintptr_t plat_get_ns_image_entrypoint(void) -{ -#ifdef PRELOADED_BL33_BASE - return PRELOADED_BL33_BASE; -#else - return PLAT_SUNXI_NS_IMAGE_OFFSET; -#endif -} - void sunxi_configure_mmu_el3(int flags) { mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, @@ -123,11 +116,9 @@ int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb) device_bit = BIT(6); break; case SUNXI_SOC_H6: - if (use_rsb) - return -ENODEV; - pin_func = 0x33; + pin_func = use_rsb ? 0x22 : 0x33; device_bit = BIT(16); - reset_offset = 0x19c; + reset_offset = use_rsb ? 0x1bc : 0x19c; break; case SUNXI_SOC_A64: pin_func = use_rsb ? 0x22 : 0x33; @@ -155,7 +146,7 @@ int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb) if (socid != SUNXI_SOC_H6) mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x28, device_bit); else - mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x19c, device_bit | BIT(0)); + mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, BIT(0)); /* assert, then de-assert reset of I2C/RSB controller */ mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); @@ -175,7 +166,7 @@ DEFINE_BAKERY_LOCK(arisc_lock); */ void sunxi_execute_arisc_code(uint32_t *code, size_t size, uint16_t param) { - uintptr_t arisc_reset_vec = SUNXI_SRAM_A2_BASE - 0x4000 + 0x100; + uintptr_t arisc_reset_vec = SUNXI_SRAM_A2_BASE + 0x100; do { bakery_lock_get(&arisc_lock); |