diff options
Diffstat (limited to 'lib/cpus/cpu-ops.mk')
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 150 |
1 files changed, 140 insertions, 10 deletions
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index e3bfc2f2e..64a4b4d47 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -1,5 +1,6 @@ # -# Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2020, NVIDIA Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -16,13 +17,21 @@ A53_DISABLE_NON_TEMPORAL_HINT ?=1 # It is enabled by default. A57_DISABLE_NON_TEMPORAL_HINT ?=1 +# Flag to enable higher performance non-cacheable load forwarding. +# It is disabled by default. +A57_ENABLE_NONCACHEABLE_LOAD_FWD ?= 0 + WORKAROUND_CVE_2017_5715 ?=1 WORKAROUND_CVE_2018_3639 ?=1 DYNAMIC_WORKAROUND_CVE_2018_3639 ?=0 -# Flag to indicate internal or external Last level cache +# Flags to indicate internal or external Last level cache # By default internal -NEOVERSE_N1_EXTERNAL_LLC ?=0 +NEOVERSE_Nx_EXTERNAL_LLC ?=0 + +# Process A57_ENABLE_NONCACHEABLE_LOAD_FWD flag +$(eval $(call assert_boolean,A57_ENABLE_NONCACHEABLE_LOAD_FWD)) +$(eval $(call add_define,A57_ENABLE_NONCACHEABLE_LOAD_FWD)) # Process SKIP_A57_L1_FLUSH_PWR_DWN flag $(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN)) @@ -47,8 +56,8 @@ $(eval $(call add_define,WORKAROUND_CVE_2018_3639)) $(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639)) $(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639)) -$(eval $(call assert_boolean,NEOVERSE_N1_EXTERNAL_LLC)) -$(eval $(call add_define,NEOVERSE_N1_EXTERNAL_LLC)) +$(eval $(call assert_boolean,NEOVERSE_Nx_EXTERNAL_LLC)) +$(eval $(call add_define,NEOVERSE_Nx_EXTERNAL_LLC)) ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0) ifeq (${WORKAROUND_CVE_2018_3639},0) @@ -121,6 +130,10 @@ ERRATA_A53_843419 ?=0 # of by the rich OS. ERRATA_A53_855873 ?=0 +# Flag to apply erratum 1530924 workaround during reset. This erratum applies +# to all revisions of Cortex A53 cpu. +ERRATA_A53_1530924 ?=0 + # Flag to apply erratum 768277 workaround during reset. This erratum applies # only to revision r0p0 of the Cortex A55 cpu. ERRATA_A55_768277 ?=0 @@ -145,6 +158,10 @@ ERRATA_A55_903758 ?=0 # only to revision <= r1p0 of the Cortex A55 cpu. ERRATA_A55_1221012 ?=0 +# Flag to apply erratum 1530923 workaround during reset. This erratum applies +# to all revisions of Cortex A55 cpu. +ERRATA_A55_1530923 ?=0 + # Flag to apply erratum 806969 workaround during reset. This erratum applies # only to revision r0p0 of the Cortex A57 cpu. ERRATA_A57_806969 ?=0 @@ -189,10 +206,18 @@ ERRATA_A57_833471 ?=0 # only to revision <= r1p3 of the Cortex A57 cpu. ERRATA_A57_859972 ?=0 +# Flag to apply erratum 1319537 workaround during reset. This erratum applies +# to all revisions of Cortex A57 cpu. +ERRATA_A57_1319537 ?=0 + # Flag to apply erratum 855971 workaround during reset. This erratum applies # only to revision <= r0p3 of the Cortex A72 cpu. ERRATA_A72_859971 ?=0 +# Flag to apply erratum 1319367 workaround during reset. This erratum applies +# to all revisions of Cortex A72 cpu. +ERRATA_A72_1319367 ?=0 + # Flag to apply erratum 852427 workaround during reset. This erratum applies # only to revision r0p0 of the Cortex A73 cpu. ERRATA_A73_852427 ?=0 @@ -241,9 +266,42 @@ ERRATA_A76_1275112 ?=0 # only to revision <= r3p0 of the Cortex A76 cpu. ERRATA_A76_1286807 ?=0 +# Flag to apply erratum 1791580 workaround during reset. This erratum applies +# only to revision <= r4p0 of the Cortex A76 cpu. +ERRATA_A76_1791580 ?=0 + +# Flag to apply erratum 1165522 workaround during reset. This erratum applies +# to all revisions of Cortex A76 cpu. +ERRATA_A76_1165522 ?=0 + +# Flag to apply erratum 1868343 workaround during reset. This erratum applies +# only to revision <= r4p0 of the Cortex A76 cpu. +ERRATA_A76_1868343 ?=0 + +# Flag to apply erratum 1946160 workaround during reset. This erratum applies +# only to revisions r3p0 - r4p1 of the Cortex A76 cpu. +ERRATA_A76_1946160 ?=0 + +# Flag to apply erratum 1508412 workaround during reset. This erratum applies +# only to revision <= r1p0 of the Cortex A77 cpu. +ERRATA_A77_1508412 ?=0 + +# Flag to apply erratum 1925769 workaround during reset. This erratum applies +# only to revision <= r1p1 of the Cortex A77 cpu. +ERRATA_A77_1925769 ?=0 + # Flag to apply erratum 1688305 workaround during reset. This erratum applies -# to revisions r0p0 - r1p0 of the Hercules cpu. -ERRATA_HERCULES_1688305 ?=0 +# to revisions r0p0 - r1p0 of the A78 cpu. +ERRATA_A78_1688305 ?=0 + +# Flag to apply erratum 1941498 workaround during reset. This erratum applies +# to revisions r0p0, r1p0, and r1p1 of the A78 cpu. +ERRATA_A78_1941498 ?=0 + +# Flag to apply erratum 1951500 workaround during reset. This erratum applies +# to revisions r1p0 and r1p1 of the A78 cpu. The issue is present in r0p0 as +# well but there is no workaround for that revision. +ERRATA_A78_1951500 ?=0 # Flag to apply T32 CLREX workaround during reset. This erratum applies # only to r0p0 and r1p0 of the Neoverse N1 cpu. @@ -293,6 +351,15 @@ ERRATA_N1_1315703 ?=0 # to revisions r3p0 - r4p0 of the Neoverse N1 cpu. ERRATA_N1_1542419 ?=0 +# Flag to apply erratum 1868343 workaround during reset. This erratum applies +# to revision <= r4p0 of the Neoverse N1 cpu. +ERRATA_N1_1868343 ?=0 + +# Flag to apply erratum 1946160 workaround during reset. This erratum applies +# to revisions r3p0, r3p1, r4p0, and r4p1 of the Neoverse N1 cpu. The issue +# exists in revisions r0p0, r1p0, and r2p0 as well but there is no workaround. +ERRATA_N1_1946160 ?=0 + # Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0. # Applying the workaround results in higher DSU power consumption on idle. ERRATA_DSU_798953 ?=0 @@ -358,6 +425,10 @@ $(eval $(call add_define,ERRATA_A53_843419)) $(eval $(call assert_boolean,ERRATA_A53_855873)) $(eval $(call add_define,ERRATA_A53_855873)) +# Process ERRATA_A53_1530924 flag +$(eval $(call assert_boolean,ERRATA_A53_1530924)) +$(eval $(call add_define,ERRATA_A53_1530924)) + # Process ERRATA_A55_768277 flag $(eval $(call assert_boolean,ERRATA_A55_768277)) $(eval $(call add_define,ERRATA_A55_768277)) @@ -382,6 +453,10 @@ $(eval $(call add_define,ERRATA_A55_903758)) $(eval $(call assert_boolean,ERRATA_A55_1221012)) $(eval $(call add_define,ERRATA_A55_1221012)) +# Process ERRATA_A55_1530923 flag +$(eval $(call assert_boolean,ERRATA_A55_1530923)) +$(eval $(call add_define,ERRATA_A55_1530923)) + # Process ERRATA_A57_806969 flag $(eval $(call assert_boolean,ERRATA_A57_806969)) $(eval $(call add_define,ERRATA_A57_806969)) @@ -426,10 +501,18 @@ $(eval $(call add_define,ERRATA_A57_833471)) $(eval $(call assert_boolean,ERRATA_A57_859972)) $(eval $(call add_define,ERRATA_A57_859972)) +# Process ERRATA_A57_1319537 flag +$(eval $(call assert_boolean,ERRATA_A57_1319537)) +$(eval $(call add_define,ERRATA_A57_1319537)) + # Process ERRATA_A72_859971 flag $(eval $(call assert_boolean,ERRATA_A72_859971)) $(eval $(call add_define,ERRATA_A72_859971)) +# Process ERRATA_A72_1319367 flag +$(eval $(call assert_boolean,ERRATA_A72_1319367)) +$(eval $(call add_define,ERRATA_A72_1319367)) + # Process ERRATA_A73_852427 flag $(eval $(call assert_boolean,ERRATA_A73_852427)) $(eval $(call add_define,ERRATA_A73_852427)) @@ -478,9 +561,41 @@ $(eval $(call add_define,ERRATA_A76_1275112)) $(eval $(call assert_boolean,ERRATA_A76_1286807)) $(eval $(call add_define,ERRATA_A76_1286807)) -# Process ERRATA_HERCULES_1688305 flag -$(eval $(call assert_boolean,ERRATA_HERCULES_1688305)) -$(eval $(call add_define,ERRATA_HERCULES_1688305)) +# Process ERRATA_A76_1791580 flag +$(eval $(call assert_boolean,ERRATA_A76_1791580)) +$(eval $(call add_define,ERRATA_A76_1791580)) + +# Process ERRATA_A76_1165522 flag +$(eval $(call assert_boolean,ERRATA_A76_1165522)) +$(eval $(call add_define,ERRATA_A76_1165522)) + +# Process ERRATA_A76_1868343 flag +$(eval $(call assert_boolean,ERRATA_A76_1868343)) +$(eval $(call add_define,ERRATA_A76_1868343)) + +# Process ERRATA_A76_1946160 flag +$(eval $(call assert_boolean,ERRATA_A76_1946160)) +$(eval $(call add_define,ERRATA_A76_1946160)) + +# Process ERRATA_A77_1508412 flag +$(eval $(call assert_boolean,ERRATA_A77_1508412)) +$(eval $(call add_define,ERRATA_A77_1508412)) + +# Process ERRATA_A77_1925769 flag +$(eval $(call assert_boolean,ERRATA_A77_1925769)) +$(eval $(call add_define,ERRATA_A77_1925769)) + +# Process ERRATA_A78_1688305 flag +$(eval $(call assert_boolean,ERRATA_A78_1688305)) +$(eval $(call add_define,ERRATA_A78_1688305)) + +# Process ERRATA_A78_1941498 flag +$(eval $(call assert_boolean,ERRATA_A78_1941498)) +$(eval $(call add_define,ERRATA_A78_1941498)) + +# Process ERRATA_A78_1951500 flag +$(eval $(call assert_boolean,ERRATA_A78_1951500)) +$(eval $(call add_define,ERRATA_A78_1951500)) # Process ERRATA_N1_1043202 flag $(eval $(call assert_boolean,ERRATA_N1_1043202)) @@ -530,6 +645,14 @@ $(eval $(call add_define,ERRATA_N1_1315703)) $(eval $(call assert_boolean,ERRATA_N1_1542419)) $(eval $(call add_define,ERRATA_N1_1542419)) +# Process ERRATA_N1_1868343 flag +$(eval $(call assert_boolean,ERRATA_N1_1868343)) +$(eval $(call add_define,ERRATA_N1_1868343)) + +# Process ERRATA_N1_1946160 flag +$(eval $(call assert_boolean,ERRATA_N1_1946160)) +$(eval $(call add_define,ERRATA_N1_1946160)) + # Process ERRATA_DSU_798953 flag $(eval $(call assert_boolean,ERRATA_DSU_798953)) $(eval $(call add_define,ERRATA_DSU_798953)) @@ -547,3 +670,10 @@ ifneq (${ERRATA_A53_835769},0) TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769 TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769 endif + +ifneq ($(filter 1,${ERRATA_A53_1530924} ${ERRATA_A55_1530923} \ + ${ERRATA_A57_1319537} ${ERRATA_A72_1319367} ${ERRATA_A76_1165522}),) +ERRATA_SPECULATIVE_AT := 1 +else +ERRATA_SPECULATIVE_AT := 0 +endif |