diff options
Diffstat (limited to 'drivers/marvell/ap807_clocks_init.c')
| -rw-r--r-- | drivers/marvell/ap807_clocks_init.c | 35 |
1 files changed, 21 insertions, 14 deletions
diff --git a/drivers/marvell/ap807_clocks_init.c b/drivers/marvell/ap807_clocks_init.c index 04c256b61..c1f861909 100644 --- a/drivers/marvell/ap807_clocks_init.c +++ b/drivers/marvell/ap807_clocks_init.c @@ -39,19 +39,29 @@ #define AP807_CPU_PLL_PARAM(cluster) AP807_CPU_PLL_CTRL(cluster) #define AP807_CPU_PLL_CFG(cluster) (AP807_CPU_PLL_CTRL(cluster) + 0x4) #define AP807_CPU_PLL_CFG_BYPASS_MODE (0x1) +#define AP807_CPU_PLL_FRC_DSCHG (0x2) #define AP807_CPU_PLL_CFG_USE_REG_FILE (0x1 << 9) static void pll_set_freq(unsigned int freq_val) { int i; + if (freq_val != PLL_FREQ_2200) + return; + for (i = 0 ; i < AP807_CLUSTER_NUM ; i++) { + /* Set parameter of cluster i PLL to 2.2GHz */ + mmio_write_32(AP807_CPU_PLL_PARAM(i), freq_val); + /* Set apll_lpf_frc_dschg - Control + * voltage of internal VCO is discharged + */ mmio_write_32(AP807_CPU_PLL_CFG(i), - AP807_CPU_PLL_CFG_USE_REG_FILE); + AP807_CPU_PLL_FRC_DSCHG); + /* Set use_rf_conf load PLL parameter from register */ mmio_write_32(AP807_CPU_PLL_CFG(i), - AP807_CPU_PLL_CFG_USE_REG_FILE | - AP807_CPU_PLL_CFG_BYPASS_MODE); - mmio_write_32(AP807_CPU_PLL_PARAM(i), freq_val); + AP807_CPU_PLL_FRC_DSCHG | + AP807_CPU_PLL_CFG_USE_REG_FILE); + /* Un-set apll_lpf_frc_dschg */ mmio_write_32(AP807_CPU_PLL_CFG(i), AP807_CPU_PLL_CFG_USE_REG_FILE); } @@ -84,19 +94,16 @@ static void aro_to_pll(void) */ void ap807_clocks_init(unsigned int freq_option) { - /* Switch from ARO to PLL */ - aro_to_pll(); - /* Modifications in frequency table: * 0x0: 764x: change to 2000 MHz. * 0x2: 744x change to 1800 MHz, 764x change to 2200/2400. * 0x3: 3900/744x/764x change to 1200 MHz. */ - switch (freq_option) { - case CPU_2000_DDR_1200_RCLK_1200: - pll_set_freq(PLL_FREQ_2000); - break; - default: - break; - } + + if (freq_option == CPU_2200_DDR_1200_RCLK_1200) + pll_set_freq(PLL_FREQ_2200); + + /* Switch from ARO to PLL */ + aro_to_pll(); + } |