diff options
Diffstat (limited to 'bl31/bl31.ld.S')
| -rw-r--r-- | bl31/bl31.ld.S | 175 |
1 files changed, 11 insertions, 164 deletions
diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S index c7185a893..8a1573ab6 100644 --- a/bl31/bl31.ld.S +++ b/bl31/bl31.ld.S @@ -1,11 +1,10 @@ /* - * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#include <platform_def.h> - +#include <common/bl_common.ld.h> #include <lib/xlat_tables/xlat_tables_defs.h> OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) @@ -38,7 +37,7 @@ SECTIONS .text . : { __TEXT_START__ = .; *bl31_entrypoint.o(.text*) - *(SORT_BY_ALIGNMENT(.text*)) + *(SORT_BY_ALIGNMENT(SORT(.text*))) *(.vectors) . = ALIGN(PAGE_SIZE); __TEXT_END__ = .; @@ -48,38 +47,7 @@ SECTIONS __RODATA_START__ = .; *(SORT_BY_ALIGNMENT(.rodata*)) - /* Ensure 8-byte alignment for descriptors and ensure inclusion */ - . = ALIGN(8); - __RT_SVC_DESCS_START__ = .; - KEEP(*(rt_svc_descs)) - __RT_SVC_DESCS_END__ = .; - -#if ENABLE_PMF - /* Ensure 8-byte alignment for descriptors and ensure inclusion */ - . = ALIGN(8); - __PMF_SVC_DESCS_START__ = .; - KEEP(*(pmf_svc_descs)) - __PMF_SVC_DESCS_END__ = .; -#endif /* ENABLE_PMF */ - - /* - * Ensure 8-byte alignment for cpu_ops so that its fields are also - * aligned. Also ensure cpu_ops inclusion. - */ - . = ALIGN(8); - __CPU_OPS_START__ = .; - KEEP(*(cpu_ops)) - __CPU_OPS_END__ = .; - - /* - * Keep the .got section in the RO section as it is patched - * prior to enabling the MMU and having the .got in RO is better for - * security. GOT is a table of addresses so ensure 8-byte alignment. - */ - . = ALIGN(8); - __GOT_START__ = .; - *(.got) - __GOT_END__ = .; + RODATA_COMMON /* Place pubsub sections for events */ . = ALIGN(8); @@ -95,38 +63,7 @@ SECTIONS *(SORT_BY_ALIGNMENT(.text*)) *(SORT_BY_ALIGNMENT(.rodata*)) - /* Ensure 8-byte alignment for descriptors and ensure inclusion */ - . = ALIGN(8); - __RT_SVC_DESCS_START__ = .; - KEEP(*(rt_svc_descs)) - __RT_SVC_DESCS_END__ = .; - -#if ENABLE_PMF - /* Ensure 8-byte alignment for descriptors and ensure inclusion */ - . = ALIGN(8); - __PMF_SVC_DESCS_START__ = .; - KEEP(*(pmf_svc_descs)) - __PMF_SVC_DESCS_END__ = .; -#endif /* ENABLE_PMF */ - - /* - * Ensure 8-byte alignment for cpu_ops so that its fields are also - * aligned. Also ensure cpu_ops inclusion. - */ - . = ALIGN(8); - __CPU_OPS_START__ = .; - KEEP(*(cpu_ops)) - __CPU_OPS_END__ = .; - - /* - * Keep the .got section in the RO section as it is patched - * prior to enabling the MMU and having the .got in RO is better for - * security. GOT is a table of addresses so ensure 8-byte alignment. - */ - . = ALIGN(8); - __GOT_START__ = .; - *(.got) - __GOT_END__ = .; + RODATA_COMMON /* Place pubsub sections for events */ . = ALIGN(8); @@ -177,27 +114,8 @@ SECTIONS */ __RW_START__ = . ; - /* - * .data must be placed at a lower address than the stacks if the stack - * protector is enabled. Alternatively, the .data.stack_protector_canary - * section can be placed independently of the main .data section. - */ - .data . : { - __DATA_START__ = .; - *(SORT_BY_ALIGNMENT(.data*)) - __DATA_END__ = .; - } >RAM - - /* - * .rela.dyn needs to come after .data for the read-elf utility to parse - * this section correctly. Ensure 8-byte alignment so that the fields of - * RELA data structure are aligned. - */ - . = ALIGN(8); - __RELA_START__ = .; - .rela.dyn . : { - } >RAM - __RELA_END__ = .; + DATA_SECTION >RAM + RELA_SECTION >RAM #ifdef BL31_PROGBITS_LIMIT ASSERT(. <= BL31_PROGBITS_LIMIT, "BL31 progbits has exceeded its limit.") @@ -208,6 +126,7 @@ SECTIONS * Define a linker symbol to mark end of the RW memory area for this * image. */ + . = ALIGN(PAGE_SIZE); __RW_END__ = .; __BL31_END__ = .; @@ -220,81 +139,9 @@ SECTIONS __NOBITS_START__ = .; #endif - stacks (NOLOAD) : { - __STACKS_START__ = .; - *(tzfw_normal_stacks) - __STACKS_END__ = .; - } >NOBITS - - /* - * The .bss section gets initialised to 0 at runtime. - * Its base address should be 16-byte aligned for better performance of the - * zero-initialization code. - */ - .bss (NOLOAD) : ALIGN(16) { - __BSS_START__ = .; - *(SORT_BY_ALIGNMENT(.bss*)) - *(COMMON) -#if !USE_COHERENT_MEM - /* - * Bakery locks are stored in normal .bss memory - * - * Each lock's data is spread across multiple cache lines, one per CPU, - * but multiple locks can share the same cache line. - * The compiler will allocate enough memory for one CPU's bakery locks, - * the remaining cache lines are allocated by the linker script - */ - . = ALIGN(CACHE_WRITEBACK_GRANULE); - __BAKERY_LOCK_START__ = .; - __PERCPU_BAKERY_LOCK_START__ = .; - *(bakery_lock) - . = ALIGN(CACHE_WRITEBACK_GRANULE); - __PERCPU_BAKERY_LOCK_END__ = .; - __PERCPU_BAKERY_LOCK_SIZE__ = ABSOLUTE(__PERCPU_BAKERY_LOCK_END__ - __PERCPU_BAKERY_LOCK_START__); - . = . + (__PERCPU_BAKERY_LOCK_SIZE__ * (PLATFORM_CORE_COUNT - 1)); - __BAKERY_LOCK_END__ = .; - - /* - * If BL31 doesn't use any bakery lock then __PERCPU_BAKERY_LOCK_SIZE__ - * will be zero. For this reason, the only two valid values for - * __PERCPU_BAKERY_LOCK_SIZE__ are 0 or the platform defined value - * PLAT_PERCPU_BAKERY_LOCK_SIZE. - */ -#ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE - ASSERT((__PERCPU_BAKERY_LOCK_SIZE__ == 0) || (__PERCPU_BAKERY_LOCK_SIZE__ == PLAT_PERCPU_BAKERY_LOCK_SIZE), - "PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements"); -#endif -#endif - -#if ENABLE_PMF - /* - * Time-stamps are stored in normal .bss memory - * - * The compiler will allocate enough memory for one CPU's time-stamps, - * the remaining memory for other CPUs is allocated by the - * linker script - */ - . = ALIGN(CACHE_WRITEBACK_GRANULE); - __PMF_TIMESTAMP_START__ = .; - KEEP(*(pmf_timestamp_array)) - . = ALIGN(CACHE_WRITEBACK_GRANULE); - __PMF_PERCPU_TIMESTAMP_END__ = .; - __PERCPU_TIMESTAMP_SIZE__ = ABSOLUTE(. - __PMF_TIMESTAMP_START__); - . = . + (__PERCPU_TIMESTAMP_SIZE__ * (PLATFORM_CORE_COUNT - 1)); - __PMF_TIMESTAMP_END__ = .; -#endif /* ENABLE_PMF */ - __BSS_END__ = .; - } >NOBITS - - /* - * The xlat_table section is for full, aligned page tables (4K). - * Removing them from .bss avoids forcing 4K alignment on - * the .bss section. The tables are initialized to zero by the translation - * tables library. - */ - xlat_table (NOLOAD) : { - *(xlat_table) - } >NOBITS + STACK_SECTION >NOBITS + BSS_SECTION >NOBITS + XLAT_TABLE_SECTION >NOBITS #if USE_COHERENT_MEM /* |