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-rw-r--r--bl1/aarch64/bl1_arch_setup.c4
-rw-r--r--bl1/aarch64/bl1_entrypoint.S22
-rw-r--r--bl1/aarch64/bl1_exceptions.S24
-rw-r--r--bl1/bl1.ld.S14
-rw-r--r--bl1/bl1_fwu.c2
-rw-r--r--bl1/bl1_main.c31
6 files changed, 56 insertions, 41 deletions
diff --git a/bl1/aarch64/bl1_arch_setup.c b/bl1/aarch64/bl1_arch_setup.c
index 624bd80f2..0a1cb304a 100644
--- a/bl1/aarch64/bl1_arch_setup.c
+++ b/bl1/aarch64/bl1_arch_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -23,7 +23,7 @@ void bl1_arch_setup(void)
******************************************************************************/
void bl1_arch_next_el_setup(void)
{
- unsigned long next_sctlr;
+ u_register_t next_sctlr;
/* Use the same endianness than the current BL */
next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT);
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S
index 0f8d5aaca..00f27184d 100644
--- a/bl1/aarch64/bl1_entrypoint.S
+++ b/bl1/aarch64/bl1_entrypoint.S
@@ -30,7 +30,8 @@ func bl1_entrypoint
_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
_init_memory=1 \
_init_c_runtime=1 \
- _exception_vectors=bl1_exceptions
+ _exception_vectors=bl1_exceptions \
+ _pie_fixup_size=0
/* --------------------------------------------------------------------
* Perform BL1 setup
@@ -38,15 +39,12 @@ func bl1_entrypoint
*/
bl bl1_setup
+#if ENABLE_PAUTH
/* --------------------------------------------------------------------
- * Enable pointer authentication
+ * Program APIAKey_EL1 and enable pointer authentication.
* --------------------------------------------------------------------
*/
-#if ENABLE_PAUTH
- mrs x0, sctlr_el3
- orr x0, x0, #SCTLR_EnIA_BIT
- msr sctlr_el3, x0
- isb
+ bl pauth_init_enable_el3
#endif /* ENABLE_PAUTH */
/* --------------------------------------------------------------------
@@ -56,16 +54,12 @@ func bl1_entrypoint
*/
bl bl1_main
+#if ENABLE_PAUTH
/* --------------------------------------------------------------------
- * Disable pointer authentication before jumping to BL31 or that will
- * cause an authentication failure during the early platform init.
+ * Disable pointer authentication before jumping to next boot image.
* --------------------------------------------------------------------
*/
-#if ENABLE_PAUTH
- mrs x0, sctlr_el3
- bic x0, x0, #SCTLR_EnIA_BIT
- msr sctlr_el3, x0
- isb
+ bl pauth_disable_el3
#endif /* ENABLE_PAUTH */
/* --------------------------------------------------
diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S
index 19a0ac27a..9dc9e6cd5 100644
--- a/bl1/aarch64/bl1_exceptions.S
+++ b/bl1/aarch64/bl1_exceptions.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -164,7 +164,7 @@ func smc_handler64
* ----------------------------------------------
*/
ldr x30, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
- msr spsel, #0
+ msr spsel, #MODE_SP_EL0
mov sp, x30
/* ---------------------------------------------------------------------
@@ -202,7 +202,7 @@ debug_loop:
ldp x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)]
ldp x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)]
ldp x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)]
- eret
+ exception_return
endfunc smc_handler64
unexpected_sync_exception:
@@ -217,12 +217,24 @@ unexpected_sync_exception:
*/
smc_handler:
/* -----------------------------------------------------
- * Save the GP registers x0-x29.
+ * Save x0-x29 and ARMv8.3-PAuth (if enabled) registers.
+ * If Secure Cycle Counter is not disabled in MDCR_EL3
+ * when ARMv8.5-PMU is implemented, save PMCR_EL0 and
+ * disable Cycle Counter.
* TODO: Revisit to store only SMCCC specified registers.
* -----------------------------------------------------
*/
- bl save_gp_registers
+ bl save_gp_pmcr_pauth_regs
+#if ENABLE_PAUTH
+ /* -----------------------------------------------------
+ * Load and program stored APIAKey firmware key.
+ * Re-enable pointer authentication in EL3, as it was
+ * disabled before jumping to the next boot image.
+ * -----------------------------------------------------
+ */
+ bl pauth_load_bl1_apiakey_enable
+#endif
/* -----------------------------------------------------
* Populate the parameters for the SMC handler. We
* already have x0-x4 in place. x5 will point to a
@@ -247,7 +259,7 @@ smc_handler:
* Switch back to SP_EL0 for the C runtime stack.
* ---------------------------------------------
*/
- msr spsel, #0
+ msr spsel, #MODE_SP_EL0
mov sp, x12
/* -----------------------------------------------------
diff --git a/bl1/bl1.ld.S b/bl1/bl1.ld.S
index c4f6b99fc..877af8e01 100644
--- a/bl1/bl1.ld.S
+++ b/bl1/bl1.ld.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -27,7 +27,7 @@ SECTIONS
.text . : {
__TEXT_START__ = .;
*bl1_entrypoint.o(.text*)
- *(.text*)
+ *(SORT_BY_ALIGNMENT(.text*))
*(.vectors)
. = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
@@ -44,7 +44,7 @@ SECTIONS
.rodata . : {
__RODATA_START__ = .;
- *(.rodata*)
+ *(SORT_BY_ALIGNMENT(.rodata*))
/* Ensure 8-byte alignment for descriptors and ensure inclusion */
. = ALIGN(8);
@@ -72,8 +72,8 @@ SECTIONS
ro . : {
__RO_START__ = .;
*bl1_entrypoint.o(.text*)
- *(.text*)
- *(.rodata*)
+ *(SORT_BY_ALIGNMENT(.text*))
+ *(SORT_BY_ALIGNMENT(.rodata*))
/* Ensure 8-byte alignment for descriptors and ensure inclusion */
. = ALIGN(8);
@@ -114,7 +114,7 @@ SECTIONS
*/
.data . : ALIGN(16) {
__DATA_RAM_START__ = .;
- *(.data*)
+ *(SORT_BY_ALIGNMENT(.data*))
__DATA_RAM_END__ = .;
} >RAM AT>ROM
@@ -131,7 +131,7 @@ SECTIONS
*/
.bss : ALIGN(16) {
__BSS_START__ = .;
- *(.bss*)
+ *(SORT_BY_ALIGNMENT(.bss*))
*(COMMON)
__BSS_END__ = .;
} >RAM
diff --git a/bl1/bl1_fwu.c b/bl1/bl1_fwu.c
index d222b9c52..48f08d2ca 100644
--- a/bl1/bl1_fwu.c
+++ b/bl1/bl1_fwu.c
@@ -483,7 +483,7 @@ static int bl1_fwu_image_auth(unsigned int image_id,
* Flush image_info to memory so that other
* secure world images can see changes.
*/
- flush_dcache_range((unsigned long)&image_desc->image_info,
+ flush_dcache_range((uintptr_t)&image_desc->image_info,
sizeof(image_info_t));
INFO("BL1-FWU: Authentication was successful\n");
diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c
index d44b46dc9..cd6fe7d5e 100644
--- a/bl1/bl1_main.c
+++ b/bl1/bl1_main.c
@@ -9,6 +9,7 @@
#include <platform_def.h>
#include <arch.h>
+#include <arch_features.h>
#include <arch_helpers.h>
#include <bl1/bl1.h>
#include <common/bl_common.h>
@@ -30,6 +31,10 @@ DEFINE_SVC_UUID2(bl1_svc_uid,
static void bl1_load_bl2(void);
+#if ENABLE_PAUTH
+uint64_t bl1_apiakey[2];
+#endif
+
/*******************************************************************************
* Helper utility to calculate the BL2 memory layout taking into consideration
* the BL1 RW data assuming that it is at the top of the memory layout.
@@ -48,7 +53,7 @@ void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
bl2_mem_layout->total_base = bl1_mem_layout->total_base;
bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base;
- flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
+ flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t));
}
/*******************************************************************************
@@ -59,18 +64,16 @@ void bl1_setup(void)
/* Perform early platform-specific setup */
bl1_early_platform_setup();
-#ifdef __aarch64__
- /*
- * Update pointer authentication key before the MMU is enabled. It is
- * saved in the rodata section, that can be writen before enabling the
- * MMU. This function must be called after the console is initialized
- * in the early platform setup.
- */
- bl_handle_pauth();
-#endif /* __aarch64__ */
-
/* Perform late platform-specific setup */
bl1_plat_arch_setup();
+
+#if CTX_INCLUDE_PAUTH_REGS
+ /*
+ * Assert that the ARMv8.3-PAuth registers are present or an access
+ * fault will be triggered when they are being saved or restored.
+ */
+ assert(is_armv8_3_pauth_present());
+#endif /* CTX_INCLUDE_PAUTH_REGS */
}
/*******************************************************************************
@@ -132,6 +135,12 @@ void bl1_main(void)
/* Perform platform setup in BL1. */
bl1_platform_setup();
+#if ENABLE_PAUTH
+ /* Store APIAKey_EL1 key */
+ bl1_apiakey[0] = read_apiakeylo_el1();
+ bl1_apiakey[1] = read_apiakeyhi_el1();
+#endif /* ENABLE_PAUTH */
+
/* Get the image id of next image to load and run. */
image_id = bl1_plat_get_next_image_id();
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-14 16:52:56 +0000