diff options
Diffstat (limited to 'bl1/aarch64')
-rw-r--r-- | bl1/aarch64/bl1_entrypoint.S | 19 | ||||
-rw-r--r-- | bl1/aarch64/bl1_exceptions.S | 17 |
2 files changed, 12 insertions, 24 deletions
diff --git a/bl1/aarch64/bl1_entrypoint.S b/bl1/aarch64/bl1_entrypoint.S index 0f8d5aaca..855add347 100644 --- a/bl1/aarch64/bl1_entrypoint.S +++ b/bl1/aarch64/bl1_entrypoint.S @@ -38,15 +38,12 @@ func bl1_entrypoint */ bl bl1_setup +#if ENABLE_PAUTH /* -------------------------------------------------------------------- - * Enable pointer authentication + * Program APIAKey_EL1 and enable pointer authentication. * -------------------------------------------------------------------- */ -#if ENABLE_PAUTH - mrs x0, sctlr_el3 - orr x0, x0, #SCTLR_EnIA_BIT - msr sctlr_el3, x0 - isb + bl pauth_init_enable_el3 #endif /* ENABLE_PAUTH */ /* -------------------------------------------------------------------- @@ -56,16 +53,12 @@ func bl1_entrypoint */ bl bl1_main +#if ENABLE_PAUTH /* -------------------------------------------------------------------- - * Disable pointer authentication before jumping to BL31 or that will - * cause an authentication failure during the early platform init. + * Disable pointer authentication before jumping to next boot image. * -------------------------------------------------------------------- */ -#if ENABLE_PAUTH - mrs x0, sctlr_el3 - bic x0, x0, #SCTLR_EnIA_BIT - msr sctlr_el3, x0 - isb + bl pauth_disable_el3 #endif /* ENABLE_PAUTH */ /* -------------------------------------------------- diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S index ed7c27a18..3e72e39f2 100644 --- a/bl1/aarch64/bl1_exceptions.S +++ b/bl1/aarch64/bl1_exceptions.S @@ -164,7 +164,7 @@ func smc_handler64 * ---------------------------------------------- */ ldr x30, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP] - msr spsel, #0 + msr spsel, #MODE_SP_EL0 mov sp, x30 /* --------------------------------------------------------------------- @@ -217,19 +217,14 @@ unexpected_sync_exception: */ smc_handler: /* ----------------------------------------------------- - * Save the GP registers x0-x29. - * TODO: Revisit to store only SMCCC specified registers. - * ----------------------------------------------------- - */ - bl save_gp_registers - - /* ----------------------------------------------------- + * Save x0-x29 and ARMv8.3-PAuth (if enabled) registers. * If Secure Cycle Counter is not disabled in MDCR_EL3 * when ARMv8.5-PMU is implemented, save PMCR_EL0 and - * disable all event counters and cycle counter. + * disable Cycle Counter. + * TODO: Revisit to store only SMCCC specified registers. * ----------------------------------------------------- */ - bl save_pmcr_disable_pmu + bl save_gp_pmcr_pauth_regs /* ----------------------------------------------------- * Populate the parameters for the SMC handler. We @@ -255,7 +250,7 @@ smc_handler: * Switch back to SP_EL0 for the C runtime stack. * --------------------------------------------- */ - msr spsel, #0 + msr spsel, #MODE_SP_EL0 mov sp, x12 /* ----------------------------------------------------- |