diff options
| -rw-r--r-- | drivers/staging/renesas/rcar/pfc/D3/pfc_init_d3.c | 24 |
1 files changed, 1 insertions, 23 deletions
diff --git a/drivers/staging/renesas/rcar/pfc/D3/pfc_init_d3.c b/drivers/staging/renesas/rcar/pfc/D3/pfc_init_d3.c index 1f20d19ba..07443dadf 100644 --- a/drivers/staging/renesas/rcar/pfc/D3/pfc_init_d3.c +++ b/drivers/staging/renesas/rcar/pfc/D3/pfc_init_d3.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved. + * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -792,13 +792,6 @@ #define MOD_SEL2_VIN4_A ((uint32_t)0U << 0U) #define MOD_SEL2_VIN4_B ((uint32_t)1U << 0U) - -/* SCIF3 Registers for Dummy write */ -#define SCIF3_BASE (0xE6C50000U) -#define SCIF3_SCFCR (SCIF3_BASE + 0x0018U) -#define SCIF3_SCFDR (SCIF3_BASE + 0x001CU) -#define SCFCR_DATA (0x0000U) - /* Realtime module stop control */ #define CPG_BASE (0xE6150000U) #define CPG_MSTPSR0 (CPG_BASE + 0x0030U) @@ -832,27 +825,12 @@ #define RDMCHCRB_SLM_256 (0x00000080U) /* once in 256 clock cycle */ #define RDMDPBASE_SEL_EXT (0x00000001U) /* External memory use */ - -static void pfc_reg_write(uint32_t addr, uint32_t data); - static void pfc_reg_write(uint32_t addr, uint32_t data) { - uint32_t prr; - - prr = mmio_read_32(RCAR_PRR); - prr &= (RCAR_PRODUCT_MASK | RCAR_CUT_MASK); - mmio_write_32(PFC_PMMR, ~data); - if (prr == (RCAR_PRODUCT_M3_CUT10)) { - mmio_write_16(SCIF3_SCFCR, SCFCR_DATA); /* Dummy write */ - } mmio_write_32((uintptr_t)addr, data); - if (prr == (RCAR_PRODUCT_M3_CUT10)) { - mmio_write_16(SCIF3_SCFCR, SCFCR_DATA); /* Dummy write */ - } } - void pfc_init_d3(void) { /* initialize module select */ |