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-rw-r--r--lib/cpus/aarch64/cortex_a53.S4
-rw-r--r--plat/ti/k3/common/k3_psci.c18
-rw-r--r--plat/ti/k3/common/plat_common.mk8
3 files changed, 2 insertions, 28 deletions
diff --git a/lib/cpus/aarch64/cortex_a53.S b/lib/cpus/aarch64/cortex_a53.S
index 6fd3c53fd..b105de26b 100644
--- a/lib/cpus/aarch64/cortex_a53.S
+++ b/lib/cpus/aarch64/cortex_a53.S
@@ -279,13 +279,11 @@ endfunc cortex_a53_reset_func
func cortex_a53_core_pwr_dwn
mov x18, x30
-#if !TI_AM65X_WORKAROUND
/* ---------------------------------------------
* Turn off caches.
* ---------------------------------------------
*/
bl cortex_a53_disable_dcache
-#endif
/* ---------------------------------------------
* Flush L1 caches.
@@ -305,13 +303,11 @@ endfunc cortex_a53_core_pwr_dwn
func cortex_a53_cluster_pwr_dwn
mov x18, x30
-#if !TI_AM65X_WORKAROUND
/* ---------------------------------------------
* Turn off caches.
* ---------------------------------------------
*/
bl cortex_a53_disable_dcache
-#endif
/* ---------------------------------------------
* Flush L1 caches.
diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c
index c7754e994..de9cefe5b 100644
--- a/plat/ti/k3/common/k3_psci.c
+++ b/plat/ti/k3/common/k3_psci.c
@@ -17,11 +17,6 @@
#include <k3_gicv3.h>
#include <ti_sci.h>
-#ifdef TI_AM65X_WORKAROUND
-/* Need to flush psci internal locks before shutdown or their values are lost */
-#include "../../../../lib/psci/psci_private.h"
-#endif
-
uintptr_t k3_sec_entrypoint;
static void k3_cpu_standby(plat_local_state_t cpu_state)
@@ -115,16 +110,6 @@ void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
k3_gic_cpuif_enable();
}
-#ifdef TI_AM65X_WORKAROUND
-static void __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
- *target_state)
-{
- flush_cpu_data(psci_svc_cpu_data);
- flush_dcache_range((uintptr_t) psci_locks, sizeof(psci_locks));
- psci_power_down_wfi();
-}
-#endif
-
static void __dead2 k3_system_reset(void)
{
/* Send the system reset request to system firmware */
@@ -154,9 +139,6 @@ static const plat_psci_ops_t k3_plat_psci_ops = {
.pwr_domain_on = k3_pwr_domain_on,
.pwr_domain_off = k3_pwr_domain_off,
.pwr_domain_on_finish = k3_pwr_domain_on_finish,
-#ifdef TI_AM65X_WORKAROUND
- .pwr_domain_pwr_down_wfi = k3_pwr_domain_pwr_down_wfi,
-#endif
.system_reset = k3_system_reset,
.validate_power_state = k3_validate_power_state,
.validate_ns_entrypoint = k3_validate_ns_entrypoint
diff --git a/plat/ti/k3/common/plat_common.mk b/plat/ti/k3/common/plat_common.mk
index 2e5f58453..83e9c62a0 100644
--- a/plat/ti/k3/common/plat_common.mk
+++ b/plat/ti/k3/common/plat_common.mk
@@ -12,8 +12,8 @@ COLD_BOOT_SINGLE_CPU := 1
PROGRAMMABLE_RESET_ADDRESS:= 1
# System coherency is managed in hardware
-HW_ASSISTED_COHERENCY := 1
-USE_COHERENT_MEM := 0
+WARMBOOT_ENABLE_DCACHE_EARLY := 1
+USE_COHERENT_MEM := 1
# A53 erratum for SoC. (enable them all)
ERRATA_A53_826319 := 1
@@ -28,10 +28,6 @@ ERRATA_A72_859971 := 1
# Split out RO data into a non-executable section
SEPARATE_CODE_AND_RODATA := 1
-# Leave the caches enabled on core powerdown path
-TI_AM65X_WORKAROUND := 1
-$(eval $(call add_define,TI_AM65X_WORKAROUND))
-
MULTI_CONSOLE_API := 1
TI_16550_MDR_QUIRK := 1
$(eval $(call add_define,TI_16550_MDR_QUIRK))