diff options
| -rw-r--r-- | docs/plat/meson-axg.rst | 1 | ||||
| -rw-r--r-- | plat/amlogic/axg/axg_bl31_setup.c | 11 | ||||
| -rw-r--r-- | plat/amlogic/axg/platform.mk | 4 |
3 files changed, 16 insertions, 0 deletions
diff --git a/docs/plat/meson-axg.rst b/docs/plat/meson-axg.rst index 8a623bd37..1e4b2c207 100644 --- a/docs/plat/meson-axg.rst +++ b/docs/plat/meson-axg.rst @@ -18,6 +18,7 @@ In order to build it: .. code:: shell CROSS_COMPILE=aarch64-none-elf- make DEBUG=1 PLAT=axg [SPD=opteed] + [AML_USE_ATOS=1 when using ATOS as BL32] This port has been tested on a A113D board. After building it, follow the instructions in the `U-Boot repository`_, replacing the mentioned **bl31.img** diff --git a/plat/amlogic/axg/axg_bl31_setup.c b/plat/amlogic/axg/axg_bl31_setup.c index 9240462e0..8cc9d69f4 100644 --- a/plat/amlogic/axg/axg_bl31_setup.c +++ b/plat/amlogic/axg/axg_bl31_setup.c @@ -84,6 +84,17 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, bl32_image_ep_info = *from_bl2->bl32_ep_info; bl33_image_ep_info = *from_bl2->bl33_ep_info; +#if AML_USE_ATOS + /* + * BL2 is unconditionally setting 0 (OPTEE_AARCH64) in arg0 even when + * the BL32 image is 32bit (OPTEE_AARCH32). This is causing the boot to + * hang when ATOS (32bit Amlogic BL32 binary-only TEE OS) is used. + * + * Hardcode to OPTEE_AARCH32 / MODE_RW_32. + */ + bl32_image_ep_info.args.arg0 = MODE_RW_32; +#endif + if (bl33_image_ep_info.pc == 0U) { ERROR("BL31: BL33 entrypoint not obtained from BL2\n"); panic(); diff --git a/plat/amlogic/axg/platform.mk b/plat/amlogic/axg/platform.mk index 463662ea1..3560b0cd1 100644 --- a/plat/amlogic/axg/platform.mk +++ b/plat/amlogic/axg/platform.mk @@ -66,6 +66,10 @@ SEPARATE_CODE_AND_RODATA := 1 # Use Coherent memory USE_COHERENT_MEM := 1 +AML_USE_ATOS := 0 +$(eval $(call assert_boolean,AML_USE_ATOS)) +$(eval $(call add_define,AML_USE_ATOS)) + # Verify build config # ------------------- |