diff options
| -rw-r--r-- | plat/hisilicon/hikey960/aarch64/hikey960_helpers.S | 31 | ||||
| -rw-r--r-- | plat/hisilicon/hikey960/hikey960_pm.c | 10 |
2 files changed, 4 insertions, 37 deletions
diff --git a/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S b/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S index c88f68ee9..d18399fbf 100644 --- a/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S +++ b/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S @@ -16,8 +16,6 @@ .globl plat_crash_console_putc .globl plat_report_exception .globl plat_reset_handler - .globl set_retention_ticks - .globl clr_retention_ticks .globl clr_ex .globl nop @@ -139,35 +137,6 @@ func plat_reset_handler endfunc plat_reset_handler /* ----------------------------------------------------- - * void set_retention_ticks(unsigned int val); - * Clobber list : x0 - * ----------------------------------------------------- - */ -func set_retention_ticks - mrs x0, CORTEX_A53_ECTLR_EL1 - bic x0, x0, #CORTEX_A53_ECTLR_CPU_RET_CTRL_MASK - orr x0, x0, #RETENTION_ENTRY_TICKS_8 - msr CORTEX_A53_ECTLR_EL1, x0 - isb - dsb sy - ret -endfunc set_retention_ticks - - /* ----------------------------------------------------- - * void clr_retention_ticks(unsigned int val); - * Clobber list : x0 - * ----------------------------------------------------- - */ -func clr_retention_ticks - mrs x0, CORTEX_A53_ECTLR_EL1 - bic x0, x0, #CORTEX_A53_ECTLR_CPU_RET_CTRL_MASK - msr CORTEX_A53_ECTLR_EL1, x0 - isb - dsb sy - ret -endfunc clr_retention_ticks - - /* ----------------------------------------------------- * void clrex(void); * ----------------------------------------------------- */ diff --git a/plat/hisilicon/hikey960/hikey960_pm.c b/plat/hisilicon/hikey960/hikey960_pm.c index 7cbf301c4..6609530c7 100644 --- a/plat/hisilicon/hikey960/hikey960_pm.c +++ b/plat/hisilicon/hikey960/hikey960_pm.c @@ -34,18 +34,16 @@ static uintptr_t hikey960_sec_entrypoint; static void hikey960_pwr_domain_standby(plat_local_state_t cpu_state) { unsigned long scr; - unsigned int val = 0; - - assert(cpu_state == PLAT_MAX_RET_STATE); scr = read_scr_el3(); - /* Enable Physical IRQ and FIQ to wake the CPU*/ + /* Enable Physical IRQ and FIQ to wake the CPU */ write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); - set_retention_ticks(val); + /* Add barrier before CPU enter WFI state */ + isb(); + dsb(); wfi(); - clr_retention_ticks(val); /* * Restore SCR to the original value, synchronisazion of |