diff options
| -rw-r--r-- | docs/firmware-design.rst | 4 | ||||
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 12 |
2 files changed, 12 insertions, 4 deletions
diff --git a/docs/firmware-design.rst b/docs/firmware-design.rst index 51f5b42eb..e3500c27b 100644 --- a/docs/firmware-design.rst +++ b/docs/firmware-design.rst @@ -516,8 +516,8 @@ This functionality can be tested with FVP loading the image directly in memory and changing the address where the system jumps at reset. For example: - -C cluster0.cpu0.RVBAR=0x4020000 - --data cluster0.cpu0=bl2.bin@0x4020000 + -C cluster0.cpu0.RVBAR=0x4022000 + --data cluster0.cpu0=bl2.bin@0x4022000 With this configuration, FVP is like a platform of the first case, where the Boot ROM jumps always to the same address. For simplification, diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index 1f62ebe7d..d87fc16fe 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -339,9 +339,9 @@ * BL2 specific defines. ******************************************************************************/ #if BL2_AT_EL3 -/* Put BL2 in the middle of the Trusted SRAM */ +/* Put BL2 towards the middle of the Trusted SRAM */ #define BL2_BASE (ARM_TRUSTED_SRAM_BASE + \ - (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1)) + (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1) + 0x2000) #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) #else @@ -374,8 +374,16 @@ #define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\ - PLAT_ARM_MAX_BL31_SIZE) #define BL31_PROGBITS_LIMIT BL2_BASE +/* + * For BL2_AT_EL3 make sure the BL31 can grow up until BL2_BASE. This is + * because in the BL2_AT_EL3 configuration, BL2 is always resident. + */ +#if BL2_AT_EL3 +#define BL31_LIMIT BL2_BASE +#else #define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) #endif +#endif #if defined(AARCH32) || JUNO_AARCH32_EL3_RUNTIME /******************************************************************************* |