diff options
| -rw-r--r-- | include/arch/aarch64/arch.h | 3 | ||||
| -rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 10 |
2 files changed, 13 insertions, 0 deletions
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h index 3ff2912f1..1fcd0f9ba 100644 --- a/include/arch/aarch64/arch.h +++ b/include/arch/aarch64/arch.h @@ -140,6 +140,8 @@ #define ID_AA64PFR0_GIC_MASK ULL(0xf) #define ID_AA64PFR0_SVE_SHIFT U(32) #define ID_AA64PFR0_SVE_MASK ULL(0xf) +#define ID_AA64PFR0_SEL2_SHIFT U(36) +#define ID_AA64PFR0_SEL2_MASK ULL(0xf) #define ID_AA64PFR0_MPAM_SHIFT U(40) #define ID_AA64PFR0_MPAM_MASK ULL(0xf) #define ID_AA64PFR0_DIT_SHIFT U(48) @@ -285,6 +287,7 @@ #define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5)) #define SCR_ATA_BIT (U(1) << 26) #define SCR_FIEN_BIT (U(1) << 21) +#define SCR_EEL2_BIT (U(1) << 18) #define SCR_API_BIT (U(1) << 17) #define SCR_APK_BIT (U(1) << 16) #define SCR_TWE_BIT (U(1) << 13) diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index d65e02d5e..b7908adec 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -181,6 +181,16 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) scr_el3 |= SCR_HCE_BIT; } + /* Enable S-EL2 if the next EL is EL2 and security state is secure */ + if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2)) { + if (GET_RW(ep->spsr) != MODE_RW_64) { + ERROR("S-EL2 can not be used in AArch32."); + panic(); + } + + scr_el3 |= SCR_EEL2_BIT; + } + /* * Initialise SCTLR_EL1 to the reset value corresponding to the target * execution state setting all fields rather than relying of the hw. |