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| author | Varun Wadekar <vwadekar@nvidia.com> | 2018-06-20 13:43:43 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2020-02-20 09:25:45 -0800 |
| commit | ee21281a5f738f00eeb2a17a775035bae70245ce (patch) | |
| tree | 34ff215562cfd4ac2e1b353fdfbef1e2b8e5bbe0 /plat | |
| parent | 37f760241e75bbfa5c4043f9e451fc0ce7ed42f7 (diff) | |
| download | platform_external_arm-trusted-firmware-ee21281a5f738f00eeb2a17a775035bae70245ce.tar.gz platform_external_arm-trusted-firmware-ee21281a5f738f00eeb2a17a775035bae70245ce.tar.bz2 platform_external_arm-trusted-firmware-ee21281a5f738f00eeb2a17a775035bae70245ce.zip | |
Tegra: common: improve cyclomatic complexity
Code complexity is a good indication of maintainability versus
testability of a piece of software.
ISO26262 introduces the following thresholds:
complexity < 10 is accepted
10 <= complexity < 20 has to be justified
complexity >= 20 cannot be accepted
Rationale is that number of test cases to fully test a piece of
software can (depending on the coverage metrics) grow exponentially
with the number of branches in the software.
This patch removes redundant conditionals from 'bl31_early_platform_setup'
handler to reduce the McCabe Cyclomatic Complexity for this function.
Change-Id: Ifb628e33269b388f9323639cd97db761a7e049c4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/nvidia/tegra/common/tegra_bl31_setup.c | 24 |
1 files changed, 11 insertions, 13 deletions
diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c index 8a49e232d..e8283517d 100644 --- a/plat/nvidia/tegra/common/tegra_bl31_setup.c +++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c @@ -1,5 +1,6 @@ /* * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -102,7 +103,6 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, struct tegra_bl31_params *arg_from_bl2 = (struct tegra_bl31_params *) arg0; plat_params_from_bl2_t *plat_params = (plat_params_from_bl2_t *)arg1; image_info_t bl32_img_info = { {0} }; - uint64_t tzdram_start, tzdram_end, bl32_start, bl32_end; int32_t ret; /* @@ -163,20 +163,17 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, * location to store the boot profiler logs. Sanity check the * address and initialise the profiler library, if it looks ok. */ - if (plat_params->boot_profiler_shmem_base != 0ULL) { + ret = bl31_check_ns_address(plat_params->boot_profiler_shmem_base, + PROFILER_SIZE_BYTES); + if (ret == (int32_t)0) { - ret = bl31_check_ns_address(plat_params->boot_profiler_shmem_base, - PROFILER_SIZE_BYTES); - if (ret == (int32_t)0) { + /* store the membase for the profiler lib */ + plat_bl31_params_from_bl2.boot_profiler_shmem_base = + plat_params->boot_profiler_shmem_base; - /* store the membase for the profiler lib */ - plat_bl31_params_from_bl2.boot_profiler_shmem_base = - plat_params->boot_profiler_shmem_base; - - /* initialise the profiler library */ - boot_profiler_init(plat_params->boot_profiler_shmem_base, - TEGRA_TMRUS_BASE); - } + /* initialise the profiler library */ + boot_profiler_init(plat_params->boot_profiler_shmem_base, + TEGRA_TMRUS_BASE); } /* @@ -205,6 +202,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, */ if (arg_from_bl2->bl32_image_info != NULL) { + uint64_t tzdram_start, tzdram_end, bl32_start, bl32_end; bl32_img_info = *arg_from_bl2->bl32_image_info; /* Relocate BL32 if it resides outside of the TZDRAM */ |