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| author | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2018-06-21 13:42:45 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-06-21 13:42:45 +0100 |
| commit | ec942295d2d4a3835e459e3c90b103fb03d35dc4 (patch) | |
| tree | 72285dceb06f8abdadb90eaddab7d1c0485a8c19 /plat | |
| parent | bbf9f129be6d359c9c021fd719295dac4a55da9c (diff) | |
| parent | 342d6220e6ef59148455debc8ef9b4adb3d292d8 (diff) | |
| download | platform_external_arm-trusted-firmware-ec942295d2d4a3835e459e3c90b103fb03d35dc4.tar.gz platform_external_arm-trusted-firmware-ec942295d2d4a3835e459e3c90b103fb03d35dc4.tar.bz2 platform_external_arm-trusted-firmware-ec942295d2d4a3835e459e3c90b103fb03d35dc4.zip | |
Merge pull request #1434 from soby-mathew/sm/fix_cntfrq
ARM Platforms: Update CNTFRQ register in CNTCTLBase frame
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/arm/common/arm_common.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c index 11bdeac66..32fd9ee68 100644 --- a/plat/arm/common/arm_common.c +++ b/plat/arm/common/arm_common.c @@ -160,6 +160,9 @@ void arm_configure_sys_timer(void) { unsigned int reg_val; + /* Read the frequency of the system counter */ + unsigned int freq_val = plat_get_syscnt_freq2(); + #if ARM_CONFIG_CNTACR reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT); reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT); @@ -169,6 +172,23 @@ void arm_configure_sys_timer(void) reg_val = (1 << CNTNSAR_NS_SHIFT(PLAT_ARM_NSTIMER_FRAME_ID)); mmio_write_32(ARM_SYS_TIMCTL_BASE + CNTNSAR, reg_val); + + /* + * Initialize CNTFRQ register in CNTCTLBase frame. The CNTFRQ + * system register initialized during psci_arch_setup() is different + * from this and has to be updated independently. + */ + mmio_write_32(ARM_SYS_TIMCTL_BASE + CNTCTLBASE_CNTFRQ, freq_val); + +#ifdef PLAT_juno + /* + * Initialize CNTFRQ register in Non-secure CNTBase frame. + * This is only required for Juno, because it doesn't follow ARM ARM + * in that the value updated in CNTFRQ is not reflected in CNTBASE_CNTFRQ. + * Hence update the value manually. + */ + mmio_write_32(ARM_SYS_CNT_BASE_NS + CNTBASE_CNTFRQ, freq_val); +#endif } #endif /* ARM_SYS_TIMCTL_BASE */ |