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| author | Paul Beesley <paul.beesley@arm.com> | 2019-05-30 14:41:18 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-05-30 14:41:18 +0000 |
| commit | e9eed3f1ed0c1477669d0bb94ee42708e1c85268 (patch) | |
| tree | c74049be50c01b969d82b8c2e54b16ea095ff717 /plat | |
| parent | 84167417db275b8fd529dae7a4cf87ab8c41a414 (diff) | |
| parent | 3e6945e919608bb071de6006a048853a2ea07c66 (diff) | |
| download | platform_external_arm-trusted-firmware-e9eed3f1ed0c1477669d0bb94ee42708e1c85268.tar.gz platform_external_arm-trusted-firmware-e9eed3f1ed0c1477669d0bb94ee42708e1c85268.tar.bz2 platform_external_arm-trusted-firmware-e9eed3f1ed0c1477669d0bb94ee42708e1c85268.zip | |
Merge "rockchip: drop rockchip-specific imported linker symbols for bl31" into integration
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/rockchip/common/bl31_plat_setup.c | 17 |
1 files changed, 4 insertions, 13 deletions
diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c index 30782d1d5..18f8dd915 100644 --- a/plat/rockchip/common/bl31_plat_setup.c +++ b/plat/rockchip/common/bl31_plat_setup.c @@ -18,15 +18,6 @@ #include <plat_private.h> #include <plat/common/platform.h> -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_BASE); -IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_LIMIT); - static entry_point_info_t bl32_ep_info; static entry_point_info_t bl33_ep_info; @@ -116,10 +107,10 @@ void bl31_plat_arch_setup(void) { plat_cci_init(); plat_cci_enable(); - plat_configure_mmu_el3(BL31_RO_BASE, - BL_COHERENT_RAM_END - BL31_RO_BASE, - BL31_RO_BASE, - BL31_RO_LIMIT, + plat_configure_mmu_el3(BL_CODE_BASE, + BL_COHERENT_RAM_END - BL_CODE_BASE, + BL_CODE_BASE, + BL_CODE_END, BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END); } |