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authorMasahiro Yamada <yamada.masahiro@socionext.com>2020-02-03 19:46:40 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2020-02-26 17:55:11 +0900
commitdd53cfe19fdc80af47ca53da8d45e3599b337323 (patch)
treecdcd89d54630342a71882352db4ed88835f6dcf1 /plat
parent896d684de648b38b6d79f337c213606021f73bb0 (diff)
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uniphier: prepare uniphier_soc_info() for next SoC
The revision register address will be changed in the next SoC. The LSI revision is needed in order to know where the revision register is located, but you need to read out the revision register for that. This is impossible. We need to know the revision register address by other means. Use BL_CODE_BASE, where the base address of the TF image that is currently running. If it is bigger than 0x80000000 (i.e. the DRAM base is 0x80000000), we assume it is a legacy SoC. Change-Id: I9d7f4325fe2085a8a1ab5310025e5948da611256 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'plat')
-rw-r--r--plat/socionext/uniphier/uniphier_soc_info.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/plat/socionext/uniphier/uniphier_soc_info.c b/plat/socionext/uniphier/uniphier_soc_info.c
index 377532deb..0e7a2d11a 100644
--- a/plat/socionext/uniphier/uniphier_soc_info.c
+++ b/plat/socionext/uniphier/uniphier_soc_info.c
@@ -4,18 +4,25 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <common/bl_common.h>
#include <lib/mmio.h>
#include "uniphier.h"
-#define UNIPHIER_REVISION 0x5f800000
+#define UNIPHIER_REVISION 0x5f800000UL
+#define UNIPHIER_REVISION_NEW 0x1f800000UL
static unsigned int uniphier_get_revision_field(unsigned int mask,
unsigned int shift)
{
- uint32_t revision = mmio_read_32(UNIPHIER_REVISION);
+ uintptr_t reg;
- return (revision >> shift) & mask;
+ if (BL_CODE_BASE >= 0x80000000UL)
+ reg = UNIPHIER_REVISION;
+ else
+ reg = UNIPHIER_REVISION_NEW;
+
+ return (mmio_read_32(reg) >> shift) & mask;
}
unsigned int uniphier_get_soc_type(void)