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| author | sumitg <sumitg@nvidia.com> | 2019-02-08 16:14:06 +0530 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2020-03-21 19:00:05 -0700 |
| commit | a45c3e9d81c0c8f3ab4a1724bf2f7373464f021e (patch) | |
| tree | d49d803c41e12ad6ef48fb33258880ddbcb5de0b /plat | |
| parent | 36e263753694fbe881110c85701e8245f5538491 (diff) | |
| download | platform_external_arm-trusted-firmware-a45c3e9d81c0c8f3ab4a1724bf2f7373464f021e.tar.gz platform_external_arm-trusted-firmware-a45c3e9d81c0c8f3ab4a1724bf2f7373464f021e.tar.bz2 platform_external_arm-trusted-firmware-a45c3e9d81c0c8f3ab4a1724bf2f7373464f021e.zip | |
Tegra210: trigger CPU0 hotplug power on using FC
Hotplug poweron is not working for boot CPU as it's being
triggerred using PMC and not with Flow Controller. This is
happening because "cpu_powergate_mask" is only getting set
for non-boot CPU's as the boot CPU's first bootup follows
different code path. The patch is marking a CPU as ON within
"cpu_powergate_mask" when turning its power domain on
during power on. This will ensure only first bootup on all
CPU's is using PMC and subsequent hotplug poweron will be
using Flow Controller.
Change-Id: Ie9e86e6f9a777d41508a93d2ce286f31307932c2
Signed-off-by: sumitg <sumitg@nvidia.com>
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/nvidia/tegra/soc/t210/plat_psci_handlers.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c index f29e624ea..7f73ea506 100644 --- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c @@ -534,6 +534,13 @@ int tegra_soc_pwr_domain_on_finish(const psci_power_state_t *target_state) } /* + * Mark this CPU as ON in the cpu_powergate_mask[], + * so that we use Flow Controller for all subsequent + * power ups. + */ + cpu_powergate_mask[plat_my_core_pos()] = 1; + + /* * T210 has a dedicated ARMv7 boot and power mgmt processor, BPMP. It's * used for power management and boot purposes. Inform the BPMP that * we have completed the cluster power up. @@ -561,7 +568,6 @@ int tegra_soc_pwr_domain_on(u_register_t mpidr) /* Turn on CPU using flow controller or PMC */ if (cpu_powergate_mask[cpu] == 0) { tegra_pmc_cpu_on(cpu); - cpu_powergate_mask[cpu] = 1; } else { tegra_fc_cpu_on(cpu); } |