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| author | davidcunado-arm <david.cunado@arm.com> | 2018-02-19 23:27:24 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-02-19 23:27:24 +0000 |
| commit | 601abdba4aaa8db1f085d0a61960c64bafc22337 (patch) | |
| tree | 6c56a6d4046061e1a195e082155cee883b5515ec /plat | |
| parent | 1504715051dabdd435a46aca21923e03a3697201 (diff) | |
| parent | 28db3e96efd3e172a2973962130dca952c9f21cd (diff) | |
| download | platform_external_arm-trusted-firmware-601abdba4aaa8db1f085d0a61960c64bafc22337.tar.gz platform_external_arm-trusted-firmware-601abdba4aaa8db1f085d0a61960c64bafc22337.tar.bz2 platform_external_arm-trusted-firmware-601abdba4aaa8db1f085d0a61960c64bafc22337.zip | |
Merge pull request #1271 from afaerber/tegra-fixes
tegra: Fix mmap_region_t struct mismatch
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/nvidia/tegra/include/tegra_private.h | 2 | ||||
| -rw-r--r-- | plat/nvidia/tegra/soc/t132/plat_setup.c | 2 | ||||
| -rw-r--r-- | plat/nvidia/tegra/soc/t186/plat_setup.c | 2 | ||||
| -rw-r--r-- | plat/nvidia/tegra/soc/t210/plat_setup.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h index ec7a277c9..7a0645562 100644 --- a/plat/nvidia/tegra/include/tegra_private.h +++ b/plat/nvidia/tegra/include/tegra_private.h @@ -10,7 +10,7 @@ #include <arch.h> #include <platform_def.h> #include <psci.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> /******************************************************************************* * Tegra DRAM memory base address diff --git a/plat/nvidia/tegra/soc/t132/plat_setup.c b/plat/nvidia/tegra/soc/t132/plat_setup.c index 24199654a..4cbb3cc85 100644 --- a/plat/nvidia/tegra/soc/t132/plat_setup.c +++ b/plat/nvidia/tegra/soc/t132/plat_setup.c @@ -8,7 +8,7 @@ #include <bl_common.h> #include <tegra_def.h> #include <tegra_private.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> /******************************************************************************* * The Tegra power domain tree has a single system level power domain i.e. a diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c index ba2457903..fad6a59e2 100644 --- a/plat/nvidia/tegra/soc/t186/plat_setup.c +++ b/plat/nvidia/tegra/soc/t186/plat_setup.c @@ -20,7 +20,7 @@ #include <tegra_def.h> #include <tegra_platform.h> #include <tegra_private.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> DEFINE_RENAME_SYSREG_RW_FUNCS(l2ctlr_el1, CORTEX_A57_L2CTLR_EL1) extern uint64_t tegra_enable_l2_ecc_parity_prot; diff --git a/plat/nvidia/tegra/soc/t210/plat_setup.c b/plat/nvidia/tegra/soc/t210/plat_setup.c index b058bed46..c3fc7b4a5 100644 --- a/plat/nvidia/tegra/soc/t210/plat_setup.c +++ b/plat/nvidia/tegra/soc/t210/plat_setup.c @@ -9,7 +9,7 @@ #include <console.h> #include <tegra_def.h> #include <tegra_private.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> /******************************************************************************* * The Tegra power domain tree has a single system level power domain i.e. a |