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| author | Puneet Saxena <puneets@nvidia.com> | 2017-09-08 12:14:03 +0530 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-11-28 11:14:21 -0800 |
| commit | 5ad50d7d81c7c5d27bea3fc86fd6ff5b840e2dfb (patch) | |
| tree | a573c8fb676d04a6ad82eea2f1c13dd7ba62e762 /plat | |
| parent | 040529e9e67f23dc85f4ff5aec94debf8cecb3cc (diff) | |
| download | platform_external_arm-trusted-firmware-5ad50d7d81c7c5d27bea3fc86fd6ff5b840e2dfb.tar.gz platform_external_arm-trusted-firmware-5ad50d7d81c7c5d27bea3fc86fd6ff5b840e2dfb.tar.bz2 platform_external_arm-trusted-firmware-5ad50d7d81c7c5d27bea3fc86fd6ff5b840e2dfb.zip | |
Tegra194: memctrl: override SE client as coherent
This patch enables IO coherency for SE clients, SEWR and SERD,
by overriding their platform settings to "normal_coherent".
This setting also converts read/write requests from these SE
clients to Normal type.
Change-Id: I31ad195ad30ecc9ee785e5e84184cda2eea5c45a
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Signed-off-by: Jeff Tsai <jefft@nvidia.com>
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_memctrl.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/plat/nvidia/tegra/soc/t194/plat_memctrl.c b/plat/nvidia/tegra/soc/t194/plat_memctrl.c index 0a6345dcc..044a4512f 100644 --- a/plat/nvidia/tegra/soc/t194/plat_memctrl.c +++ b/plat/nvidia/tegra/soc/t194/plat_memctrl.c @@ -388,7 +388,6 @@ static void tegra194_memctrl_reconfig_mss_clients(void) mc_set_tsa_w_passthrough(SDMMCW); mc_set_tsa_w_passthrough(SDMMCWA); mc_set_tsa_w_passthrough(SDMMCWAB); - mc_set_tsa_w_passthrough(SESWR); mc_set_tsa_w_passthrough(TSECSWR); mc_set_tsa_w_passthrough(TSECSWRB); mc_set_tsa_w_passthrough(UFSHCW); @@ -468,8 +467,8 @@ static void tegra194_memctrl_reconfig_mss_clients(void) mc_set_txn_override(SDMMCW, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); mc_set_txn_override(SDMMCWA, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); mc_set_txn_override(SDMMCWAB, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); - mc_set_txn_override(SESRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); - mc_set_txn_override(SESWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); + mc_set_txn_override(SESRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, NO_OVERRIDE); + mc_set_txn_override(SESWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_COHERENT_SNOOP, NO_OVERRIDE); mc_set_txn_override(TSECSRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); mc_set_txn_override(TSECSRDB, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); mc_set_txn_override(TSECSWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE); |