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| author | Lin Huang <hl@rock-chips.com> | 2018-04-20 15:40:15 +0800 |
|---|---|---|
| committer | Lin Huang <hl@rock-chips.com> | 2018-05-15 16:31:00 +0800 |
| commit | 133598cb7d2ae5fabb020123423a22ff68915d8f (patch) | |
| tree | 9fa89433923d54ded459fe4164bcea9fba1172d3 /plat/rockchip | |
| parent | da9d1d59d4fd722059f935aa9dec347be7f17d0d (diff) | |
| download | platform_external_arm-trusted-firmware-133598cb7d2ae5fabb020123423a22ff68915d8f.tar.gz platform_external_arm-trusted-firmware-133598cb7d2ae5fabb020123423a22ff68915d8f.tar.bz2 platform_external_arm-trusted-firmware-133598cb7d2ae5fabb020123423a22ff68915d8f.zip | |
rockchip/rk3399: improve pmu powermode configure when suspend
we need to enable PMU_WKUP_RST_EN for pmu powermode configure, since
enable wakeup reset will hold the soc status, so the SOC will not affect
by some power or other single glitch when resume, and keep the soc in the
right status. And it not need to enable DDRIO_RET_HW_DE_REQ, the ddr resume
will do it manual.
Change-Id: Ib4af897ffb3cb63dc2aa9a6002e5d9ef86ee4a49
Signed-off-by: Lin Huang <hl@rock-chips.com>
Diffstat (limited to 'plat/rockchip')
| -rw-r--r-- | plat/rockchip/rk3399/drivers/pmu/pmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c index ed1ea8b63..014d4047c 100644 --- a/plat/rockchip/rk3399/drivers/pmu/pmu.c +++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c @@ -836,6 +836,7 @@ static void sys_slp_config(void) BIT_WITH_WMSK(PMU_CLR_GIC2_CORE_L_HW)); slp_mode_cfg = BIT(PMU_PWR_MODE_EN) | + BIT(PMU_WKUP_RST_EN) | BIT(PMU_INPUT_CLAMP_EN) | BIT(PMU_POWER_OFF_REQ_CFG) | BIT(PMU_CPU0_PD_EN) | @@ -853,7 +854,6 @@ static void sys_slp_config(void) BIT(PMU_DDRIO0_RET_DE_REQ) | BIT(PMU_DDRIO1_RET_EN) | BIT(PMU_DDRIO1_RET_DE_REQ) | - BIT(PMU_DDRIO_RET_HW_DE_REQ) | BIT(PMU_CENTER_PD_EN) | BIT(PMU_PERILP_PD_EN) | BIT(PMU_CLK_PERILP_SRC_GATE_EN) | |