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author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-01-25 13:28:38 +0000 |
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committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2019-02-01 12:24:57 +0000 |
commit | f66053372952f9f30ffc4da28080c36a38e17ce5 (patch) | |
tree | ee4679495a390326c21fb528194bb68cd4340671 /plat/qemu | |
parent | f7bf9b0d9543c37b1d6e65436a8f9eaabe1ad8a4 (diff) | |
download | platform_external_arm-trusted-firmware-f66053372952f9f30ffc4da28080c36a38e17ce5.tar.gz platform_external_arm-trusted-firmware-f66053372952f9f30ffc4da28080c36a38e17ce5.tar.bz2 platform_external_arm-trusted-firmware-f66053372952f9f30ffc4da28080c36a38e17ce5.zip |
Remove duplicated definitions of linker symbols
Many parts of the code were duplicating symbols that are defined in
include/common/bl_common.h. It is better to only use the definitions in
this header.
As all the symbols refer to virtual addresses, they have to be
uintptr_t, not unsigned long. This has also been fixed in bl_common.h.
Change-Id: I204081af78326ced03fb05f69846f229d324c711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'plat/qemu')
-rw-r--r-- | plat/qemu/qemu_bl31_setup.c | 9 | ||||
-rw-r--r-- | plat/qemu/sp_min/sp_min_setup.c | 25 |
2 files changed, 1 insertions, 33 deletions
diff --git a/plat/qemu/qemu_bl31_setup.c b/plat/qemu/qemu_bl31_setup.c index 97468114a..7453b8900 100644 --- a/plat/qemu/qemu_bl31_setup.c +++ b/plat/qemu/qemu_bl31_setup.c @@ -16,15 +16,6 @@ #include "qemu_private.h" /* - * The next 3 constants identify the extents of the code, RO data region and the - * limit of the BL3-1 image. These addresses are used by the MMU setup code and - * therefore they must be page-aligned. It is the responsibility of the linker - * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL31_END (unsigned long)(&__BL31_END__) - -/* * Placeholder variables for copying the arguments that have been passed to * BL3-1 from BL2. */ diff --git a/plat/qemu/sp_min/sp_min_setup.c b/plat/qemu/sp_min/sp_min_setup.c index 88decdf4d..88f7397c6 100644 --- a/plat/qemu/sp_min/sp_min_setup.c +++ b/plat/qemu/sp_min/sp_min_setup.c @@ -27,29 +27,6 @@ static entry_point_info_t bl33_image_ep_info; -/* - * The next 3 constants identify the extents of the code, RO data region and the - * limit of the BL3-1 image. These addresses are used by the MMU setup code and - * therefore they must be page-aligned. It is the responsibility of the linker - * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL32_RO_BASE (unsigned long)(&__RO_START__) -#define BL32_RO_LIMIT (unsigned long)(&__RO_END__) -#define BL32_END (unsigned long)(&__BL32_END__) - -#if USE_COHERENT_MEM -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) -#endif - /****************************************************************************** * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 * interrupts. @@ -146,7 +123,7 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1, void sp_min_plat_arch_setup(void) { qemu_configure_mmu_svc_mon(BL32_RO_BASE, BL32_END - BL32_RO_BASE, - BL32_RO_BASE, BL32_RO_LIMIT, + BL_CODE_BASE, BL_CODE_END, BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END); } |