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author | Etienne Carriere <etienne.carriere@linaro.org> | 2018-02-02 13:23:22 +0100 |
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committer | Etienne Carriere <etienne.carriere@linaro.org> | 2018-02-05 10:42:47 +0100 |
commit | 765ed9fc55360ca4aee3667c900728e6c6b66907 (patch) | |
tree | aa16953487ceda5dd7914ced49c24866d525f0a0 /plat/qemu/platform.mk | |
parent | 10c669585456bc9122bb86c1710e80599f5eae89 (diff) | |
download | platform_external_arm-trusted-firmware-765ed9fc55360ca4aee3667c900728e6c6b66907.tar.gz platform_external_arm-trusted-firmware-765ed9fc55360ca4aee3667c900728e6c6b66907.tar.bz2 platform_external_arm-trusted-firmware-765ed9fc55360ca4aee3667c900728e6c6b66907.zip |
qemu: support ARMv7/Cortex-A15
Define Qemu AArch32 implementation for some platform functions
(core position, secondary boot cores, crash console). These are
derived from the AArch64 implementation.
BL31 on Qemu is needed only for ARMv8 and later. On ARMv7, BL32 is
the first executable image after BL2.
Support SP_MIN and OP-TEE as BL32: create a sp_min make script target
in Qemu, define mapping for IMAGE_BL32
Minor fix Qemu return value type for plat_get_ns_image_entrypoint().
Qemu model for the Cortex-A15 does not support the virtualization
extension although the core expects it. To overcome the issue, Qemu
ARMv7 configuration set ARCH_SUPPORTS_VIRTUALIZATION to 0.
Add missing AArch32 assembly macro arm_print_gic_regs from ARM platform
used by the Qemu platform.
Qemu Cortex-A15 model integrates a single cluster with up to 4 cores.
Change-Id: I65b44399071d6f5aa40d5183be11422b9ee9ca15
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Diffstat (limited to 'plat/qemu/platform.mk')
-rw-r--r-- | plat/qemu/platform.mk | 52 |
1 files changed, 40 insertions, 12 deletions
diff --git a/plat/qemu/platform.mk b/plat/qemu/platform.mk index 43ab846b4..f1f299fe8 100644 --- a/plat/qemu/platform.mk +++ b/plat/qemu/platform.mk @@ -4,6 +4,25 @@ # SPDX-License-Identifier: BSD-3-Clause # +ifeq (${ARM_ARCH_MAJOR},7) +# ARMv7 Qemu support in trusted firmware expects the Cortex-A15 model. +# Qemu Cortex-A15 model does not implement the virtualization extension. +# For this reason, we cannot set ARM_CORTEX_A15=yes and must define all +# the ARMv7 build directives. +MARCH32_DIRECTIVE := -mcpu=cortex-a15 +$(eval $(call add_define,ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING)) +$(eval $(call add_define,ARMV7_SUPPORTS_GENERIC_TIMER)) +# Qemu expects a BL32 boot stage. +NEED_BL32 := yes +endif # ARMv7 + +ifeq (${SPD},opteed) +add-lib-optee := yes +endif +ifeq ($(AARCH32_SP),optee) +add-lib-optee := yes +endif + include lib/libfdt/libfdt.mk # Enable new version of image loading on QEMU platforms @@ -15,10 +34,13 @@ endif PLAT_PATH := plat/qemu/ PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ - -Iinclude/plat/arm/common/aarch64/ \ -Iplat/qemu/include \ -Iinclude/common/tbbr +ifeq (${ARM_ARCH_MAJOR},8) +PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} +endif + # Use translation tables library v2 by default ARM_XLAT_TABLES_LIB_V1 := 0 $(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) @@ -26,11 +48,11 @@ $(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) PLAT_BL_COMMON_SOURCES := plat/qemu/qemu_common.c \ - drivers/arm/pl011/aarch64/pl011_console.S + drivers/arm/pl011/${ARCH}/pl011_console.S ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ - lib/xlat_tables/aarch64/xlat_tables.c + lib/xlat_tables/${ARCH}/xlat_tables.c else include lib/xlat_tables_v2/xlat_tables.mk @@ -87,22 +109,27 @@ BL1_SOURCES += drivers/io/io_semihosting.c \ drivers/io/io_fip.c \ drivers/io/io_memmap.c \ lib/semihosting/semihosting.c \ - lib/semihosting/aarch64/semihosting_call.S \ + lib/semihosting/${ARCH}/semihosting_call.S \ plat/qemu/qemu_io_storage.c \ - lib/cpus/aarch64/aem_generic.S \ - lib/cpus/aarch64/cortex_a53.S \ - lib/cpus/aarch64/cortex_a57.S \ - plat/qemu/aarch64/plat_helpers.S \ + plat/qemu/${ARCH}/plat_helpers.S \ plat/qemu/qemu_bl1_setup.c +ifeq (${ARM_ARCH_MAJOR},8) +BL1_SOURCES += lib/cpus/aarch64/aem_generic.S \ + lib/cpus/aarch64/cortex_a53.S \ + lib/cpus/aarch64/cortex_a57.S +else +BL1_SOURCES += lib/cpus/${ARCH}/cortex_a15.S +endif + BL2_SOURCES += drivers/io/io_semihosting.c \ drivers/io/io_storage.c \ drivers/io/io_fip.c \ drivers/io/io_memmap.c \ lib/semihosting/semihosting.c \ - lib/semihosting/aarch64/semihosting_call.S\ + lib/semihosting/${ARCH}/semihosting_call.S\ plat/qemu/qemu_io_storage.c \ - plat/qemu/aarch64/plat_helpers.S \ + plat/qemu/${ARCH}/plat_helpers.S \ plat/qemu/qemu_bl2_setup.c \ plat/qemu/dt.c \ $(LIBFDT_SRCS) @@ -111,11 +138,12 @@ BL2_SOURCES += plat/qemu/qemu_bl2_mem_params_desc.c \ plat/qemu/qemu_image_load.c \ common/desc_image_load.c endif -ifeq (${SPD},opteed) +ifeq ($(add-lib-optee),yes) BL2_SOURCES += lib/optee/optee_utils.c endif +ifeq (${ARM_ARCH_MAJOR},8) BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \ lib/cpus/aarch64/cortex_a53.S \ lib/cpus/aarch64/cortex_a57.S \ @@ -128,7 +156,7 @@ BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \ plat/qemu/aarch64/plat_helpers.S \ plat/qemu/qemu_bl31_setup.c \ plat/qemu/qemu_gic.c - +endif # Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images # in the FIP if the platform requires. |