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authorDavid Cunado <david.cunado@arm.com>2017-06-01 12:48:39 +0100
committerDavid Cunado <david.cunado@arm.com>2017-06-20 11:40:33 +0100
commit568ac1f730a3a7445b81c6b396d354e320ef8e6a (patch)
treeacafd98ca74d1fc322eec74163cccee02b35d1a9 /plat/mediatek/mt6795
parent3465ab602a24f6932ca7b30e849de82fa770d986 (diff)
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Resolve build errors flagged by GCC 6.2
With GCC 6.2 compiler, more C undefined behaviour is being flagged as warnings, which result in build errors in ARM TF build. This patch addresses issue caused by enums with values that exceed maximum value for an int. For these cases the enum is converted to a set of defines. Change-Id: I5114164be10d86d5beef3ea1ed9be5863855144d Signed-off-by: David Cunado <david.cunado@arm.com>
Diffstat (limited to 'plat/mediatek/mt6795')
-rw-r--r--plat/mediatek/mt6795/include/mcucfg.h12
1 files changed, 5 insertions, 7 deletions
diff --git a/plat/mediatek/mt6795/include/mcucfg.h b/plat/mediatek/mt6795/include/mcucfg.h
index c81de3320..eff8d3440 100644
--- a/plat/mediatek/mt6795/include/mcucfg.h
+++ b/plat/mediatek/mt6795/include/mcucfg.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -104,12 +104,10 @@ struct mt6795_mcucfg_regs {
static struct mt6795_mcucfg_regs *const mt6795_mcucfg = (void *)MCUCFG_BASE;
/* cpu boot mode */
-enum {
- MP0_CPUCFG_64BIT_SHIFT = 12,
- MP1_CPUCFG_64BIT_SHIFT = 28,
- MP0_CPUCFG_64BIT = 0xf << MP0_CPUCFG_64BIT_SHIFT,
- MP1_CPUCFG_64BIT = 0xf << MP1_CPUCFG_64BIT_SHIFT
-};
+#define MP0_CPUCFG_64BIT_SHIFT 12
+#define MP1_CPUCFG_64BIT_SHIFT 28
+#define MP0_CPUCFG_64BIT (U(0xf) << MP0_CPUCFG_64BIT_SHIFT)
+#define MP1_CPUCFG_64BIT (U(0xf) << MP1_CPUCFG_64BIT_SHIFT)
/* scu related */
enum {