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| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2020-02-28 10:51:49 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2020-02-28 10:51:49 +0000 |
| commit | 351d358fed9f08e8e716a0a619857f87310c384d (patch) | |
| tree | 38f1e444b50dbc132d671fb750da0caf9a713d3d /plat/intel/soc/agilex | |
| parent | 1e81e9a4c7d96df1fc0edafb5b332aab0b61932d (diff) | |
| parent | d603fd3033c0ef31ee5fc1eccdcfbe77eaf53690 (diff) | |
| download | platform_external_arm-trusted-firmware-351d358fed9f08e8e716a0a619857f87310c384d.tar.gz platform_external_arm-trusted-firmware-351d358fed9f08e8e716a0a619857f87310c384d.tar.bz2 platform_external_arm-trusted-firmware-351d358fed9f08e8e716a0a619857f87310c384d.zip | |
Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration
Diffstat (limited to 'plat/intel/soc/agilex')
| -rw-r--r-- | plat/intel/soc/agilex/bl2_plat_setup.c | 6 | ||||
| -rw-r--r-- | plat/intel/soc/agilex/platform.mk | 5 |
2 files changed, 7 insertions, 4 deletions
diff --git a/plat/intel/soc/agilex/bl2_plat_setup.c b/plat/intel/soc/agilex/bl2_plat_setup.c index 468b356b5..a87dea8b3 100644 --- a/plat/intel/soc/agilex/bl2_plat_setup.c +++ b/plat/intel/soc/agilex/bl2_plat_setup.c @@ -1,6 +1,6 @@ /* - * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. - * Copyright (c) 2019, Intel Corporation. All rights reserved. + * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2019-2020, Intel Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -20,6 +20,7 @@ #include "agilex_pinmux.h" #include "ccu/ncore_ccu.h" #include "qspi/cadence_qspi.h" +#include "socfpga_emac.h" #include "socfpga_handoff.h" #include "socfpga_mailbox.h" #include "socfpga_private.h" @@ -72,6 +73,7 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, socfpga_delay_timer_init(); init_ncore_ccu(); + socfpga_emac_init(); init_hard_memory_controller(); mailbox_init(); diff --git a/plat/intel/soc/agilex/platform.mk b/plat/intel/soc/agilex/platform.mk index f47c3f113..0a91c23dd 100644 --- a/plat/intel/soc/agilex/platform.mk +++ b/plat/intel/soc/agilex/platform.mk @@ -1,6 +1,6 @@ # -# Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. -# Copyright (c) 2019, Intel Corporation. All rights reserved. +# Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2019-2020, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -42,6 +42,7 @@ BL2_SOURCES += \ plat/intel/soc/common/socfpga_delay_timer.c \ plat/intel/soc/common/socfpga_image_load.c \ plat/intel/soc/common/socfpga_storage.c \ + plat/intel/soc/common/soc/socfpga_emac.c \ plat/intel/soc/common/soc/socfpga_handoff.c \ plat/intel/soc/common/soc/socfpga_mailbox.c \ plat/intel/soc/common/soc/socfpga_reset_manager.c \ |