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| author | Alistair Delva <adelva@google.com> | 2021-02-16 21:01:22 +0000 |
|---|---|---|
| committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | 2021-02-16 21:01:22 +0000 |
| commit | efb2826bb8160e2d8e0fcec85133a7468484f9fd (patch) | |
| tree | 37a21c69306801ee7cdda5167a30896c8740155b /plat/imx/common/imx_sip_handler.c | |
| parent | b00a71fc312c9781fa6f404dccfb55b062b2ccac (diff) | |
| parent | faa476c0caaa598afa5a6109d17102db5fe35ec6 (diff) | |
| download | platform_external_arm-trusted-firmware-master.tar.gz platform_external_arm-trusted-firmware-master.tar.bz2 platform_external_arm-trusted-firmware-master.zip | |
Merge branch 'aosp/upstream-master' into HEAD am: faa476c0caHEADandroid-s-beta-5android-s-beta-4android-s-beta-3android-s-beta-2android-s-beta-1mastermain-cg-testing-releaseandroid-s-beta-5android-s-beta-4
Original change: https://android-review.googlesource.com/c/platform/external/arm-trusted-firmware/+/1589611
MUST ONLY BE SUBMITTED BY AUTOMERGER
Change-Id: I3a25534ceed4f8e188510641080d8b8ed49b8f62
Diffstat (limited to 'plat/imx/common/imx_sip_handler.c')
| -rw-r--r-- | plat/imx/common/imx_sip_handler.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/plat/imx/common/imx_sip_handler.c b/plat/imx/common/imx_sip_handler.c index 62048b696..f9f5577c4 100644 --- a/plat/imx/common/imx_sip_handler.c +++ b/plat/imx/common/imx_sip_handler.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: BSD-3-Clause */ +#include <arch.h> #include <stdlib.h> #include <stdint.h> #include <services/std_svc.h> @@ -12,6 +13,7 @@ #include <common/debug.h> #include <common/runtime_svc.h> #include <imx_sip_svc.h> +#include <lib/el3_runtime/context_mgmt.h> #include <sci/sci.h> #if defined(PLAT_imx8qm) || defined(PLAT_imx8qx) @@ -185,3 +187,37 @@ uint64_t imx_buildinfo_handler(uint32_t smc_fid, return ret; } + +int imx_kernel_entry_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4) +{ + static entry_point_info_t bl33_image_ep_info; + entry_point_info_t *next_image_info; + unsigned int mode; + + if (x1 < (PLAT_NS_IMAGE_OFFSET & 0xF0000000)) + return SMC_UNK; + + mode = MODE32_svc; + + next_image_info = &bl33_image_ep_info; + + next_image_info->pc = x1; + + next_image_info->spsr = SPSR_MODE32(mode, SPSR_T_ARM, SPSR_E_LITTLE, + (DAIF_FIQ_BIT | DAIF_IRQ_BIT | DAIF_ABT_BIT)); + + next_image_info->args.arg0 = 0; + next_image_info->args.arg1 = 0; + next_image_info->args.arg2 = x3; + + SET_SECURITY_STATE(next_image_info->h.attr, NON_SECURE); + + cm_init_my_context(next_image_info); + cm_prepare_el3_exit(NON_SECURE); + + return 0; +} |