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authorSoby Mathew <soby.mathew@arm.com>2020-01-24 10:04:10 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2020-01-24 10:04:10 +0000
commit5f3ed6aaedac18d37980da13fd0d5ec49ef686fb (patch)
treeee2512633b33c9e207a36c140643d9e4ac609c7b /lib
parent4e1b0b193cad14ad2d67819ab34b3fa58f2e5c04 (diff)
parentf461fe346b728d0e88142fd7b8f2816415af18bc (diff)
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Merge "Prevent speculative execution past ERET" into integration
Diffstat (limited to 'lib')
-rw-r--r--lib/cpus/aarch64/cortex_a76.S4
-rw-r--r--lib/cpus/aarch64/neoverse_n1.S4
-rw-r--r--lib/cpus/aarch64/wa_cve_2017_5715_mmu.S4
-rw-r--r--lib/el3_runtime/aarch64/context.S2
4 files changed, 7 insertions, 7 deletions
diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S
index 868667ebc..baefa4676 100644
--- a/lib/cpus/aarch64/cortex_a76.S
+++ b/lib/cpus/aarch64/cortex_a76.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -85,7 +85,7 @@
bic x3, x2, #CORTEX_A76_CPUACTLR2_EL1_DISABLE_LOAD_PASS_STORE
csel x3, x3, x1, eq
msr CORTEX_A76_CPUACTLR2_EL1, x3
- eret /* ERET implies ISB */
+ exception_return /* exception_return contains ISB */
.endif
1:
/*
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S
index faf53a848..d058d98df 100644
--- a/lib/cpus/aarch64/neoverse_n1.S
+++ b/lib/cpus/aarch64/neoverse_n1.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -553,7 +553,7 @@ func neoverse_n1_errata_ic_trap_handler
*/
esb
#endif
- eret
+ exception_return
1:
ret
endfunc neoverse_n1_errata_ic_trap_handler
diff --git a/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S b/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
index 9277cc624..5134ee3f1 100644
--- a/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
+++ b/lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -48,7 +48,7 @@ vector_base wa_cve_2017_5715_mmu_vbar
ccmp w0, w1, #0, eq
/* Static predictor will predict a fall through */
bne 1f
- eret
+ exception_return
1:
.endif
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S
index 1bbd61005..9bd25bac9 100644
--- a/lib/el3_runtime/aarch64/context.S
+++ b/lib/el3_runtime/aarch64/context.S
@@ -534,6 +534,6 @@ func el3_exit
*/
esb
#endif
- eret
+ exception_return
endfunc el3_exit